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XEPLD Optimize: Unexpected error: epldinst.cc:40


Record #1393

Problem Title:
XEPLD Optimize:	Unexpected error: epldinst.cc:40


Problem Description:
When attempting to Implement a CPLD design in the
Design Manager/Flow Engine, the following error occurs:

Reading <design>.xff
Unexpected error detected.
Please report to Xilinx with reference:
"epldinst.cc:40"

This may be caused by an illegal connection in the design.

For example, the following configuration has been seen to cause
this error:

       signal-----OBUF------OPAD
			 |
			 |
       internal signal----

This would be illegal since an OBUF cannot drive internal logic.


Solution 1:


Check the schematic for illegal connections.



End of Record #1393