Answers Database

Configuration fails: CCLK does not toggle in master mode


Record #1428

Problem Title:
Configuration fails: CCLK does not toggle in master mode


Problem Description:
Master mode
Upon power-up or after the program pin is toggled low then
high, configuration fails.
Done stays low.
Init goes high and stays high.
Cclk does not toggle.


Solution 1:

One possible cause is that the mode pins are not actually
set correctly.	To use the mode pins as I/O after
configuration use a pull-down resistors on the mode pins, and
verify that they are in a logic low during configuration.
The suggested pulldown resistor value is 1k to 4.7k ohms.
This offsets the internal pull-up of 50k - 100k ohms.
If a weaker pull-down resistor is used then the voltage at the
pin may exceed the maximum low voltage threshold and be
interpreted as a logic high voltage.

M0 is logic low for all master modes.
If M0 is determined to be a logic high, the cclk will not toggle
and thus no data will be read in.

See pages 14-25 through 14-32 of the 1996 DataBook for more
information on configuration issues.



End of Record #1428