Answers Database

CADENCE: minimum install to support Verilog simulation of Xilinx designs


Record #1471

Product Family:  Software

Product Line:  Cadence

Problem Title:
CADENCE:  minimum install to support Verilog simulation of Xilinx
designs



Problem Description:
Keywords:  minimum install Verilog simulation

Urgency:  standard

General Description:
The standard DS381 Xilinx Interface from Cadence is integrated
into the FPGA Designer front end and includes support for
Concept, Composer, Verilog-XL, and Rapidsim.

This solution details the minimum installation required if you
are only interested in Verilog simulation.  It applies to
Cadence releases 9404 through 9504 for someone who is not
using FPGA Designer, Concept, Composer, or Rapidsim.


Solution 1:

The following files and directories are required:

$CDS/share/license:   all files

$CDS/share/library/xilinx:
  verilog2000/
  verilog3000/
  verilog4000/
  verilog4000e/   (9504 and 9604 only)
  verilog5200/	  (9504 only)
  verilogxcm5200/ (9504 patch and 9604 only)
  verilog7000/


$CDS/share/library/xilinx/data:

  xc2000.pin	xc3000.pin    xc4000.pin    xc4000e.pin    xc5200.pin
  xc2000.pkg	xc3000.pkg    xc4000.pkg    xc4000e.pkg    xc5200.pkg

  xc7000.pkg	xc7000.pin


$CDS/tools/bin:

  license.dat*	 lmhostid*     lmstat*
  cdslmd*	 lmdown*       lmremove*      lmver*
  lic_error*	 lmgrd*        lmreread*


$CDS/tools/pic/picdesigner/bin:

	       tim2sdf*     xgencst*   (optional)
	       timenet*     xnf2cds*
  funcnet*     timesim*     xnf2cds.exe*
  funcsim*     xcdsprep*    xnfout*



End of Record #1471