Answers Database
XACT: How to LOC (lock) pins and reserve/restrict pins via a constraintsfile
Record #1506
Product Family: Software
Product Line: FPGA Core
Problem Title:
XACT: How to LOC (lock) pins and reserve/restrict pins via a
constraintsfile
Problem Description:
Many designs require an IO signal to be "LOC"'d to a certain pin, and/or a pin o
n the device remain unused. The latter is especially important if the designer d
oes not want to share user IO with configuration pins. The following describes h
ow to accomplish this using a constraints file.
Note: A constraints file can be created in a text editor. Place each constraint
on a line, and end the constraint with a ";". A typical name for the file is "de
sign_name.cst". Use the option "cstfile=design_name.cst" in PPR, if you are runn
ing from the command line, or select the file in the Design Manager->Implement d
ialog box, if you are running via Windows. Consult the Development System Refere
nce Guide Vol.2 or the Libraries guide for more information on constraints files
.
Solution 1:
How to LOC a signal to a pin:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
If the target architecture is a 4K or 5k:
place instance SIGNAME : PIN;
where SIGNAME is the name of the signal to be LOC'd,
and PIN is the pin number. Example:
place instance data_in : p6;
Typically SIGNAME is the signal name between the pad and buf
in schematic, or your top-level port names in HDL code.
However, if there is doubt, or if you get PPR ERROR 5812,
you may look in your .xtf file (in a text editor) to see
what the tools regard as your IO signal names. Search for
"EXT" records (usually at the end), which defines the
external IO signal names.
Example EXT record: EXT, data_in, I
If your syntax differs, change it to match the .xtf file
syntax.
If the target architecture is 3000A or 3100A:
place block BLKNAME : PIN;
where BLKNAME is the name of the IOB block.
The name of the IOB block is typically identical to the
name of the signal between the pad and the buf. However,
if there is any doubt, you may look in the .crf file
to see how the IOB was mapped(look for "IOB CROSS-REFERENCE
REPORT"). Use the IOB name.
If the target architecture is 3000, 3100 (non-A) or 2000:
place block BLKNAME PIN;
Note there is no colon between BLKNAME and PIN.
Reference the Libraries Guide, Chapter 4, for more info.
Solution 2:
How to restrict a pin from being used:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
If the target architecture is a 4K or 5k:
notplace instance * : PIN;
where PIN is the pin number. Example:
notplace instance * : p6;
If the target architecture is 3000A or 3100A:
notplace block * : PIN;
where PIN is the pin number.
If the target architecture is 3000, 3100 (non-A) or 2000:
prohibit location PIN;
where PIN is the pin number.
Note there is no colon between location and PIN.
Reference the Libraries Guide, Chapter 4, for more info.
End of Record #1506
For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals! |