Answers Database

M1 V-System: VHDL/VITAL RAMs do not simulate properly or respond to stimuli on HP-UX


Record #1548

Product Family:  Software

Product Line:  Model Technology

Problem Title:
M1 V-System: VHDL/VITAL RAMs do not simulate properly or respond to
stimuli on HP-UX



Problem Description:
Keywords: VHDL, VITAL, V-System, RAM, HP, HP-UX, simulation, simprim, Model Tech
nology

Urgency: Hot

General Description:

This problem may occur in V-System when simulating an M1 post-synthesis
functional or post-route timing model, i.e., any simulation model that uses
M1 VHDL/VITAL simprims.

RAMs may not simulate properly or respond to input stimuli under V-System
on HP workstations.  (Curiously, they simulate properly under other
operating systems.)  The information stored in a RAM may remain at its
initial value even after you have tried to write new data to the RAM.


Solution 1:

This problem occurs due to a misinterpretation of the function call
VitalStateTable by V-System's VITAL-acceleration engine.  To work around
the problem, this function must be recompiled so that it is interpreted by
the standard (non-VITAL) VHDL interpreter.  This is done using the -novital
switch in VCOM, e.g.:

   vcom -work simprim -novital VitalStateTable \
     $XILINX/vhdl/src/simprims/simprim_VITAL.vhd

If your VHDL simprim library is not local or in a writeable directory, this
command must be performed by your system administrator.

Note:  This can theoretically degrade the performance of the V-System
simulator, since the VitalStateTable function will no longer utilize
VITAL acceleration.  The extent of this performance hit has not been
quantified.

For more information on compiling HDL models, see Xilinx Solution 1923.
This problem should be fixed in the upcoming ModelSim version 5.0.



End of Record #1548