Answers Database

Mentor schematic: Adding an INIT property to a CPLD flip-flop


Record #1844

Product Family:  Software

Product Line:  Mentor

Problem Title:
Mentor schematic: Adding an INIT property to a CPLD flip-flop


Problem Description:
Keywords: CPLD, INIT, Mentor, XC7300, XC9500

Urgency: Standard

General Description:

In order to specify the initial, power-up state of a flip-flop in a CPLD
(XC7300 or XC9500), you must attached an INIT property to the flip-flop.
The default power-up state, if no INIT property exists, is zero (logic
low).

Note: This does not apply to Xilinx FPGAs.


Solution 1:

In your Mentor Schematic select the flip-flop whose initial state you wish
to change, then select Right Mouse Button->Properties->Add.

Add the following property:

   Property Name:  =INIT
   Property Value:  S (initial set state) or R (initial reset state)

The equals sign before the INIT property name is required.  Without it,
the property will not properly pass through EDIF2XNF.



End of Record #1844