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In BYTE-WIDE parallel configuration which is the MSB D7 or D0?


Record #1941

Problem Title:
In BYTE-WIDE parallel configuration which is the MSB D7 or D0?


Problem Description:
The first two bytes to be loaded in parallel configuration are FF 20.  If the da
ta is viewed this way is D7 the MSB or LSB?
(D7 .. D0 refer to the parrallel configuration data pins on the
FPGA)


Solution 1:

D0 is the MSB and D7 is the LSB...

So, the second byte loaded to D7...D0 of the FPGA would look like:

[D0:D7]: D0  D1  D2  D3  D4  D5  D6  D7
[ 2 0 ]:  0   0   1   0   0   0   0   0

The data book will refer to D0 as the LSB in some cases.
This is because that is how the data is organized internally
to the FPGA.  To check that the configuration data is being
presented in the proper order, use the example above.



End of Record #1941