Answers Database

Viewsynthesis: PULLUP/PULLDOWN instantiation


Record #1967

Product Family:  Software

Product Line:  ViewLogic

Problem Title:
Viewsynthesis: PULLUP/PULLDOWN instantiation


Problem Description:
Keywords: instantiate, VHDL, buffer, pad, pullup, pulldown

Urgency: Standard

Instantiating a Pullup resistor on an output between the OBUFT and the PAD is
not properly supported by Viewlogic.  The Viewsynthesis tool analyzes the code
as if two drivers were driving the same signal and infers two output buffers.


Solution 1:

The first solution is the generate a schematic and manually add the pullups.

1) Compile and synthesize the VHDL code with the following options enabled:
- Generate Schematic
- Automatically infer I/O pads
2) Load the schematic in the schematic editor and manually add the pullups
between the buffer and the pad.

The drawback with this workaround is that the schematic has to be re-modified
every time the code is synthesized.



Solution 2:

The second workaround is to create a hierarchical top-level schematic.

1) Compile and Synthesize the VHDL code with the following options:
- Create top-level Symbol
- Do not automatically add I/O pads.
2) Load the symbol in the schematic editor and manually add all the buffers
and pads along with the Pullups.

This solution will allow the recompilation of the VHDL code without having to
modify the top-level schematic.



End of Record #1967