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M1.3/M1.4 CONCEPT/HDL DIRECT--Iterated Instance methodology replaces SIZE property


Record #1991

Product Family:  Software

Product Line:  Cadence

Problem Title:
M1.3/M1.4 CONCEPT/HDL DIRECT--Iterated Instance methodology replaces
SIZE property



Problem Description:
Keywords:  concept size iterated instance hdl direct replicate

Urgency:  hot

General Description:

In the M1.0 release of the Concept/Xilinx interface, the SIZE
property is not supported.  The decision not to support SIZE
in the M1 Unified libraries was arrived at jointly by Xilinx
and Cadence based on the following considerations:

1. The conversion would have required a tremendous effort, and it would
not have added any functionality that could not be provided by other
means (in this case, using iterated instances).

2. It would have been disadvantageous from a simulation point of view.
All of the Verilog-XL Unified library simulation primitives would have
had to be rewritten as single-bit wide primitives, using bitwise
operators instead of logical operators.  This would have significantly
slowed down simulation, and we would not have been able to specify delays
on these operations.

3. Logiblox can be used to generate most parameterized modules.


If you wish to replicate a component in your design, you must
use the Iterated Instance methodology.	This methodology is
documented in detail in the Cadence HDL Direct User Guide.




Solution 1:

Example:

Say we want to build a 4 bit register using iterated
instances to implement 4 FDCEs connected up together.  We
would first instantiate the FDCE, and assign a PATH value to
the FDCE [symbol] body.  (A PATH value in Concept is the
equivalent of an INSTANCE name.)

Ordinarily, the PATH value is some alphanumeric string
consisting of a letter and one or more numerical digits, for
example, "I3". In the usual Concept flow, a unique PATH value
is automatically assigned to each component in your design
the first time you save the design.

To replicate the FDCE body 4 times, we define the PATH
property to have an iterated value of I3(3:0).
Any nets connected to this body which must be replicated
must also be named with the appropriate index of <3..0> in
this example.

In general, flip-flop data (D) and output (O) pins are
usually replicated, but CLK and CE pins are not:


Iterated instance example





End of Record #1991