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Definition of a "gate", when defining number of logic gates in a FPGA


Record #2155

Problem Title:
Definition of a "gate", when defining number of logic gates in a FPGA


Problem Description:
Keywords: gates, functions, ASIC, VLSI, logic

Urgency: Standard

General Description:
Xilinx Literature often refers to the a "typical gate range" when it indicates h
ow dense a part is; the question of what does Xilinx consider a "gate" may be in
 question.


Solution 1:

For example, for a XC4010E:

The typical gate range for this part is 7000-20000 logic gates, using 20-30% of
the CLBs as RAM. The last two digits in the XC4000 family's name refers to an av
erage gate count, in thousands (XC4010->10,000 gates).

The term "gate" refers to a "LSI-Logic" (name of a company ) 2-input gate. A fun
ction generator is counted as about 8 gates (the 800 4-input function generators
 in an XC4010 are thus about 6400 gates, the remaining gates are in the flip-flo
ps.
When the function generator is used as a 16 x 1 RAM, each bit is worth 5 gates,
so the function generator jumps to 80 gates.



End of Record #2155