Answers Database

M1.3/M1.4 MAP may generate Wide Decoder groups that cannot be placed/routed.


Record #2298

Product Family:  Software

Product Line:  Merged Core

Problem Title:
M1.3/M1.4 MAP may generate Wide Decoder groups that cannot be
placed/routed.



Problem Description:
Keywords: MAP, edge decoders

Urgency: standard

Reference: 15235  (jg)


General Description:

This release of MAP may generate Wide Decoder groups packed in
such a way that they cannot be placed or routed.


Solution 1:

Manually constrain ALL the wide edge decoders in your design
by applying edge-type LOC attributes to the edge decoder
symbols either directly in the design schematic, or in a
.UCF constraints file for the design.

These are the location constraints that can be used for
the wide edge decoders:

TL: Top Left
BL: Bottom Left
TR: Top Right
BR: Bottom Right

B: Bottom
T: Top
L: Left
R: Right

Example design.ucf:

<input>
# This locs the decoder to the top-left edge
INST $1I3/MY_DECODER2 LOC=TL;
# This locs the decoder to the bottom-right edge
INST $1I3/MY_DECODER4 LOC=BR;
</input>

See the (Xilinx Manual Libraries Guide, Chapter 13, on
Attributes and Carry Logic) for a full listing of valid
location constraints for wide decoders, and complete
information on wide decoder constraint syntax.

(Note that you cannot constrain only SOME of the edge
decoders in your design--you must either constrain ALL of
them, or NONE of them.)



End of Record #2298