Answers Database

M1 Xilinx Design Manager - Abel is not a valid file entry format


Record #2329

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
M1 Xilinx Design Manager - Abel is not a valid file entry format


Problem Description:
Keywords:  M1, Design, Manager, Abel, format

Urgency:  standard

General Description:  Abel is not an accepted design entry
format.


Error displayed:

Command Line: ngdbuild -p xc9500 /proj/design.abl xc9500.ngd
ERROR:basnb:48 - Cannot find or build NGO from
"/proj/design.abl".  Please make sure the source file exists
and is of a legal netlist format (e.g., NGO, EDIF or XNF).

One or more errors were found during NGDBUILD.	No NGD file
will be written.

Writing NGDBUILD log file "xc9500.bld"...


Solution 1:

You must trsnlate your .abl file to either .xnf or edif file
formats for FPGAs.

For CPLDs you should convert the .abl file to either the
.xnf, edif or .pld file format.




End of Record #2329