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Timing Analyzer: Expected one number greater than or equal to 0.000000


Record #2385

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
Timing Analyzer: Expected one number greater than or equal to 0.000000


Problem Description:
Keywords: delay greater less expected number
Urgency: Standard

General Description:
This message may be issued when you try to execute a
DelayGreaterThan (dg) or DelayLessThan (dl) command.


Solution 1:

These commands only apply to CPLDs (xc7300 and xc9500
families).

This message is issued when you are analyzing an FPGA
design.



End of Record #2385

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