Answers Database

M1.5 TRCE/Timing Analyzer: 0 paths analyzed for a TIMESPEC which should have paths


Record #2435

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
M1.5 TRCE/Timing Analyzer: 0 paths analyzed for a TIMESPEC which should
have paths



Problem Description:
Keywords: timespec path analyze timingan

Urgency: Standard

General Description:
The Timing Analyzer reports that it analyzed 0 paths for
a TIMESPEC which should apply to valid paths in the design.


Solution 1:

If there are multiple timing constraints in the design which
overlap, some constraints will take precedence over others.

If all of the paths covered by one constraint are also
covered by other, higher-priority constraints, the original
constraint is completely overridden.  When this happens, the
Timing Analyzer reports 0 paths analyzed for that constraint.



End of Record #2435