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9500: What is PRLD in the CPLD simulation?


Record #2471

Problem Title:
9500: What is PRLD in the CPLD simulation?


Problem Description:
Keywords:  PRLD, simulation, timing

Urgency:  Standard

General Description:
What is the PRLD signal when doing a CPLD simulation?


Solution 1:

PRLD is an active-high reset signal that must be toggled
in the beginning of any timing simulation.

This models the behavior of the chip at power up when all
flip flops come to a known state.



End of Record #2471

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