Return to Support Page
 homesearchagentssupportask xilinxmap

Answers Database


XC9500: Why do the XC9500 libraries have pull-up elements?


Record #3000

Product Family:  Hardware

Product Line:  9500

Problem Title:
XC9500: Why do the XC9500 libraries have pull-up elements?


Problem Description:
Keywords: 9500, pullups, pull-ups

Urgency: standard

General Description:

Although the XC9500 family devices have pullups, they are not user
controllable. Why are they still included as library elements?



Solution 1:

If an internal 3-state mux is drawn in a schematic (using 2 or more
BUFE/BUFT buffers), direct functional simulation of the schematic
will fail to produce a 1 state if all buffers are disabled (actual
chip behavior) unless a pullup symbol is connected.



Solution 2:

Users can retarget an FPGA design containing pullup symbols to
9k without having to remove the pullups; the resulting
implementation will still be accurate.



End of Record #3000

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals!

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents