Answers Database

XC2000: Considerations when Migrating an XC2000 Design to a Newer DeviceFamily


Record #3115

Product Family:  Hardware

Product Line:  2000

Problem Title:
XC2000: Considerations when Migrating an XC2000 Design to a Newer
DeviceFamily



Problem Description:
Keywords:	     XC2000, 2000, migrate, migrating, upgrade,
		     upgrading, conversion, convert

Urgency:	     Standard

General Description: The following are considerations to be aware of when
		     attempting to migrate from an existing XC2000 device
		     to a newer FPGA device.


Solution 1:

Usually the easiest migration path from an XC2000 to a newer device family
is just to print out all of the schematics and re-enter the design.  If
the origional design was performed on a design entry tool which allows
for an easy migration path to a newer existing design entry tool then by
all means, this should be done but many XC2000 designs were either created
within Xilinx Design Editor (XDE) or an out-dated design entry tool.

The biggest XC2000 device was an XC2064 and that stands for 64 CLBs (each
containing 1 Function Generator and and one FF).  This means that such a
design typically is not too large and design re-entry is typically not be
that encompassing of a task.

During the design migration, the following should be considered:

1.  XC2000 have asynchronous SET and RESET on each FF.	None of our other
    FPGA devices have this feature.  If this design happens to use an
    asyncrous set and reset, one would have to be converted to a
    syncronous signal.

2.  Pin compatibility.	If it is required to stay in the same device package,
    most of the pinouts could be preserved but it is possible that not all
    of the pinouts can remain unchanged.

3.  If the design is origionated from a schematic, the design is most
    likely origionally created in pre-unified libraries.  These would
    need to be interpreted into unified equivelents.

4.  Asyncronous paths in the design's timing will change.  This needs
    to be accounted for.

5.  If the design uses external crystal, XC5200 and XC4000 do not have
    XTL1 and XTL2 crystal amplifier pins.  It is suggested to goto a
    canned oscillator.

6.  XC5200 and XC4000 do not have PWRDWN pin.  If the design is using this
    suggest to use the GTS signal instead.

7.  A timing simulation is highly suggested after the design conversion to
    ensure that functionality did not change and that the design will run
    properly at system clocking speeds.



End of Record #3115