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9500: What are the recommended maximum rise times for inputs?


Record #3226

Product Family:  Hardware

Product Line:  9500

Problem Title:
9500:  What are the recommended maximum rise times for inputs?


Problem Description:
Keywords:  CPLD, 9500, rise time, maximum

Urgency: Standard

General Description:  Questions have risen concerning the
maximum rise time suggested for an input signal on a 9500
device.


Solution 1:

The suggested maximum rise time for a signal that is routed
to combinatorial logic is 50ns.

For signals that use the global routing resources (Global
Clock, Global Output Enable and Global Set/Reset), it is
recommended that the maximum rise time not exceed 10ns.



End of Record #3226

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