Answers Database

FPGA Express 2.0: Turbo Mode may cause Alliance version of FPGA Express to crash


Record #3308

Product Family:  Software

Product Line:  Synopsys

Problem Title:
FPGA Express 2.0: Turbo Mode may cause Alliance version of FPGA Express
to crash



Problem Description:
Keywords: FPGA Express, 2.0, Alliance, fe.ctl, Synopsys, crash

Urgency: Hot

General Description:
The Alliance version of FPGA Express 2.0 may crash in the turbo mode when it
encounters specific HDL constructs.   Turbo mode is enabled by default.
Two such constructs are:

a)  very complex CASE or IF statments.	An example is if the width of the
    condition is larger than 32 bits

b)  PROCESS which have two sequential IF statments, sequentially describing two
    async resets

These constructs are legal HDL, but the turbo mode of the Express compiler
does not handle them properly.

The Alliance version is the version sold directly by Synopsys, not the
Foundation Express version distributed by Xilinx.  Foundation Express 2.0
will consist of a patched version of FPGA Express 2.0 that does not exhibit
this problem.  This patch will be available to Alliance customers soon.


Solution 1:

The workaround is to disable the turbo mode.  To do so, place a file called
fe.ctl in your Express project directory (the same directory as the .EXP file).
The fe.ctl file can be found at:

http://www.xilinx.com/techdocs/htm_index/sw_synopsys.htm
or
ftp://ftp.xilinx.com/pub/swhelp/synopsys



End of Record #3308