Answers Database

XC9500:Is there a reset or a done pin for CPLDs to determine if the device runs correctly?


Record #3321

Problem Title:
XC9500:Is there a reset or a done pin for CPLDs to determine if the
device runs correctly?



Problem Description:
KEYWORDS: reset, CPLD, 9500, done, verify

URGENCY: Standard

DESCRIPTION: The configuration and powerup for CPLDs is different than FPGAs.


Solution 1:

There is NO RESET or DONE pin for CPLD/9500 devices. In order to verify that the
 device runs correctly, the only known method is to download the contents of the
 JEDEC file to the device programming registers. (This is also called JTAG / Bou
ndary-Scan.) Configure the device and read back the contents of the device progr
amming registers and compare them to the JEDEC file. If there's any discrepancy,
 an error message in the will appear.

This is essentially the same as executing Boundary Scan
Instructions: Program and Verify.



End of Record #3321