Answers Database
M1.4 Map - FATAL_ERROR:x4ema:x4emaclb.c:663:1.44:5.2 - Flop in Y found
Record #3381
Product Family: Software
Product Line: FPGA Implementation
Problem Title:
M1.4 Map - FATAL_ERROR:x4ema:x4emaclb.c:663:1.44:5.2 - Flop in Y found
Problem Description:
Keywords: M1.4, Map, fatal, error, x4ema, logic, reduction
Urgency: Standard
General Description:
Design using Viewlogic targeting 4010E and brought into M1.4. In MAP, durin
g Optimizing, the following error occurs:
FATAL_ERROR:x4ema:x4emaclb.c:663:1.44:5.2 - Flop in Y found.
Process will terminate. Please call Xilinx support.
This design ran through fine in Xact 6.0.1. The error still occurs with the
latest core_nt patch.
Solution 1:
Resolution 1:
The workaround is to run MAP with the "-l" option. This option is
available in the Design Manager GUI under Implement Options. Click on
Edit Template for Implentation and De-Select Replicate Logic to Allow
Logic Level Reduction. This Fatal Error was caused because the trimming
step in logic replication has encoutered a fully constrained and packed
CLB.
Solution 2:
A fix for this error is included in the current M1.4 Core
Applications patch available from the Xilinx Download Area:
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sol14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sun14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_hp14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_nt14.zip
End of Record #3381
For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals! |