Answers Database

M1.3/M1.4 CPLDs: How to use the 'TIE' option of unused pins in 9500 devices


Record #3404

Problem Title:
M1.3/M1.4 CPLDs: How to use the 'TIE' option of unused pins in 9500
devices



Problem Description:
KEYWORDS: cpld, tie, 9500, option

URGENCY: standard

DESCRIPTION: What happens to unused pins in 9500/CPLD designs? How do I tie them
? Do I have to tie them?


Solution 1:

For the 9500 devices, there's an option in the design manager called "create pro
grammable ground pins." For this option, click Implement->options->edit template
 (from the program options template)->Basic tab.

Selecting this option does not require you to tie unused pins to your board. If
this option is NOT selected, you'll have to tie those unused pins to ground on y
our board.

Note: TIE is optional AND supported. Xilinx recommends the TIE when a design is:
 performance Critical or power critical.



Solution 2:

To invoke the User Programmable Grounds using the CPLD command,
use the '-grounds' option.



End of Record #3404