Answers Database

M1.4 MAP: ERROR:x52ma:250 This type of signal is not supported by the XC5200 ...


Record #3427

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
M1.4 MAP:  ERROR:x52ma:250 This type of signal is not supported by the
XC5200 ...



Problem Description:
Keywords: primitive, FDP, FTP, FDPE, asynchronous

Status: Standard

General Description:

ERROR:x52ma:250 - FDP symbol "INSTANCE" (output signal="Net")
has an asynchronous set pin.  This type of signal is not
supported by the XC5200 architecture.

Ngdbuild is finding a FDP with a proper set of pins in the
base library definitions and is using it (which is a primitive).  The XC5200 doe
s not have an asynchronous set as
a primitve.

Note that this will only be a problem for hierarchical netlist flows such as XNF
, since the macro instantiation and its definition are in separate files. In a t
ypical EDIF flow, the macro will be defined in the EDIF, and NGDBUILD only expan
ds leafs in the hierarchy. However, some EDIF writers such as ORCAD generate hie
rarchical EDIF netlists which result in the error.

This error may also apply to other symbols from the XC5200
libraries.


Solution 1:

In the case of an FDP:

Implement the FDP using some other (non-Xilinx name), MYFDP
for example. In order to get an FDP one has to first use the
FDPE. To implement an FDPE invert the D-input and the Q-output of the FDCE (a pr
imitive).  To implement an FDP from
FDPE, just tie the clock enable to Vcc.  This symbol has the functionality of a
flip flop with an asynchronous preset
(FDP).

Similarily one can implement the FTP or any other symbol
that may have caused this problem.



End of Record #3427