Answers Database
FPGA Express: Instantiations in VHDL are UNLINKED (FE-CHECK-4)
Record #3436
Product Family: Software
Product Line: Synopsys
Problem Title:
FPGA Express: Instantiations in VHDL are UNLINKED (FE-CHECK-4)
Problem Description:
Keywords: FPGA Express, VHDL, library, component, instantiation, linked
Urgency: Standard
General Description:
After creating an implementation for a VHDL design which instantiates library
primitives or black boxes, the component is not linked to the design.
Warning: Cannot link cell 'design/component_instance' to its reference design
'library_component' (FE-LINK--2)
Warning: The cell '/top/component_instance' is not linked to any design
(FE-CHECK-4)
To verify this, right click on the implementation and select Edit Constraints.
Under the Modules tab, the word, "UNLINKED" appears before the instance name.
Solution 1:
FPGA Express library primitive declarations must be capitalized within VHDL.
For example, an AND2 gate will be an UNLINKED module when the following
declaration in a design is implemented.
component and2
port(I0, I1: in std_logic; O: out std_logic);
end component;
However, the following code in a design appears LINKED after implementation.
component AND2
port(I0, I1: in std_logic; O: out std_logic);
end component;
Solution 2:
If the UNLINKED cell is a "black box", then the UNLINKED warning may be
safely ignored.
A black box is a component instantiation in your HDL code that is represented
by a netlist that will be merged in by NGDBUILD. This netlist may be EDIF,
XNF or NGO, and must be supplied to NGDBUILD along with the top level XNF file
written by FPGA Express.
DO NOT read XNF files into Express, as problems may arise when Express tries to
re-optimize carry logic.
Nothing special must be done within Express 2.0 to preserve this black box.
With Express 1.2, the module must be preserved. To do this, double click on
the Implementation to bring up the constraints GUI. Under the Modules tab,
under the Hierarchy column, set the module to "Preserve".
End of Record #3436
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