Answers Database

A1.4/F1.4 DC2NCF: set_output_delay command affects following set_max_delay command


Record #3619

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
A1.4/F1.4 DC2NCF: set_output_delay command affects following
set_max_delay command



Problem Description:
From the following DC file:

create_clock -period 30 -waveform {0 15} find(port,"CLK")
set_max_delay 20 -from find(port,"INPUT_A") -to find(port,"OUTPUT_A")
set_output_delay 5  -clock "CLK" find(port,"OUTPUT_FOO")
set_max_delay 20 -from find(port,"INPUT_B") -to  find(port,"OUTPUT_B")

The following NCF file is created:

TIMESPEC  TS_CLK = PERIOD : "CLK":  30 : HIGH : 15;
NET "CLK" TNM = "CLK";
TIMESPEC TS_2= FROM : PADS("INPUT_A") :TO: PADS("OUTPUT_A"): 20;
NET "OUTPUT_FOO" OFFSET = OUT : 5 : BEFORE : "CLK";
TIMESPEC TS_4= FROM : PADS("INPUT_B") :TO: PADS("OUTPUT_B"): 15;

As you can see TS_4 was affected by 5ns from the previous
OFFSET constraint on OUTPUT_FOO.  This should not happen because
there is no relation between these signals.

If you move the set_output_delay command in the DC file to the
end then both timespecs are correct.  However, when you move
it to the beginning all timespecs following it are decreased
by 5ns.

Current workaround is to modify the NCF file.


Solution 1:

A fix for this dc2ncf error is included in the current M1.4 Core
Applications patch available from the Xilinx Download Area:

ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sol14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sun14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_hp14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_nt14.zip



End of Record #3619