Answers Database

A1.4/F1.4 Map - XC5200 combinatorial latch implemented wrong in a f5_mux.


Record #3722

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
A1.4/F1.4 Map - XC5200 combinatorial latch implemented wrong in a
f5_mux.



Problem Description:
Design has a latch that feeds logic. The output of the
latch  goes to a and2b2 in design it is implemented as a
and2b1, the feed from the latch is not inverted



Solution 1:

This problem is fixed in the latest M1.4 Core Tools Patch available on the Xilin
x
Download Area:

ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sol14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sun14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_hp14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_nt14.zip



End of Record #3722