Answers Database

M1 PAR: Multi-Pass Place and Route: The Design Score and what it means


Record #3749

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
M1 PAR: Multi-Pass Place and Route: The Design Score and what it means


Problem Description:
Keywords: Design Score, Timing Score, Multi-Pass Place and Route, PAR, MPPR

Urgency: Standard

General Description:

What does the "Design Score" mean when I run Multi-Pass Place and Route?  Why
don't the tools save the iteration using the best "Timing Score"?


Solution 1:

The design score is derived from a formula that takes the
following into account:

     The number of unrouted nets.
     The number of timing constraints not met.
     The amount (ns) that the constraints were not met by.
     The max delay on a net with weight greater than 3.
     Net weights and priorities.
     The average of all max delays on all nets.
     The average of the max delays on 10 worst nets.

For the exact formula, see chapter 10 of the Design System Reference Guide.

The timing score is simply a summation in picoseconds of all timing violations.

This score can be misleading because you may have a design with one net than
violates a constraint by 10ns which would result in the same timing score as a
design with 100 nets violating constraints by .1 ns. Therefore, timing score is

not necessarily a good indication of which result will run fastest.

The design score attempts to judge more that simply the current frequency
obtained. It is a more comprehensive analysis that also indicates how
much the potential  the design has for improvement with continued routing
effort. There is a margin of error in this score however, so it is best to
try re-entrant routing on several of the top design score results, to find
the best possible overall result.



End of Record #3749