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M1.4 PAR: FATAL_ERROR:basnd:basndutils.c:130:1.6 - Internal Error - signal has a loop


Record #3794

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
M1.4 PAR: FATAL_ERROR:basnd:basndutils.c:130:1.6 - Internal Error -
signal has a loop



Problem Description:
Keywords: basnd, basndutils, loop, signal, fatal, par, router

Urgency: standard

General Description:  When guiding the PAR without guiding the MAP and checking
the box " match guide design exactly", the following error happens in PAR: FATAL
_ERROR:basnd:basndutils.c:130:1.6 - Internal Error - signal has a loop, router p
roblem?  Process will terminate.  Please call Xilinx support.


Solution 1:

This is a bug in M1.4.12. It has been fixed in M1.5. Current workaround is to un
check the box "match guide design exactly".



End of Record #3794

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