Answers Database

M1.4 Map - ERROR:x4kma:387 - Unable to obey design constraints which require the combination of the following symbols into a single CLB:


Record #4026

Product Family:  Software

Product Line:  FPGA Implementation

Problem Title:
M1.4 Map - ERROR:x4kma:387 - Unable to obey design constraints which
require the combination of the following symbols into a single CLB:



Problem Description:
Keywords:  map, x4kma, 387, constraints

Urgency: standard

General Description:  map gives the following error related to RLOC'd RAM:

ERROR:x4kma:312 - The following symbols could not be constrained to a single
   CLB:
	DFF symbol
   "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/newSim1535/dff"
   (output signal=fpga_core_i_cu_ram_r256x8_i/ablock/dcode_0)
	FMAP symbol
   "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/dcodeslice_0func/new
S
   im1534" (output
   signal=fpga_core_i_cu_ram_r256x8_i/ablock/large_ram_we0/dcode_in_0)
	HMAP symbol
   "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/newSim1539" (output
   signal=fpga_core_i_cu_ram_r256x8_i/ablock/dwe_0)
	FMAP symbol "fpga_core_i_G_1220" (output signal=fpga_core_i_us_cm_we)
   More than two combinational outputs are required.  These symbols share the
   same RLOC attribute value, which requires them to be mapped to the same CLB.



Solution 1:

This problem is fixed in the latest M1.4 Core Tools Update
available on the Xilinx Download Area:

ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sol14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_sun14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_hp14_m14.tar.Z
ftp://ftp.xilinx.com/pub/swhelp/M1.4_alliance/core_nt14.zip


NOTE: For this issue, the environment variable XIL_MAP_NO_FMAP_PACK
must be set in addition to the software update.

setenv XIL_MAP_NO_FMAP_PACK (SunOS and Solaris)
setenv XIL_MAP_NO_FMAP_PACK 1 (HP)
set XIL_MAP_NO_FMAP_PACK = 1 (PC)



End of Record #4026