DeDris Embedded Algorithms

Overview

DeDris Embedded Algorithms is specialized in the mapping of complex application-specific signal-processing algorithms onto dedicated custom hardware architectures. DeDris bridges the gap between algorithm design and development, and custom digital processing architectures. Algorithms in high-level languages, such as C, Matlab or Pseudo-code, can be implemented extremely efficiently through combined optimization on algorithmic, architectural and gate level. DeDris implementations of signal-processing algorithms are named DSP Instant Components and are available in Synthesizable VHDL, various netlist formats and as hard-coded plug and play FPGA and ASIC macro blocks.

The main advantages of DeDris DSP Instant Components are:

• Direct implementation of complex advanced signal-processing blocks
• Compliance with standards and norms
• Significant reduction of time-to-market and design cost
• Very efficient implementation
• Possibility to create very compact multiple channel implementations
• Customer support on both hardware and algorithm level

In addition to DSP Instant Components, DeDris offers custom design and implementation of application-specific signal processing algorithms. Our mathematicians understand and optimize your processing needs. Together with DeDris' architecture and hardware-design engineers, they create fast and optimized solutions for your application. Turn-around times from algorithm to silicon in weeks and months rather than years are feasible when teaming with DeDris. DeDris also has in-depth knowledge of ITU/CCITT standards. Our application engineers can guide you through the possibilities. Together we select the best algorithms for your application, which we instantly implement in hardware for you.

DeDris has a strong expertise in speech-related technologies. Multiple speech-compression algorithms have been implemented offering toll quality speech compression, and bit rates from 32 kbit/sec down to 2.4 kbit/sec. In addition, DeDris has developed expertise in the fields of speech recognition and synthesis. A further area of expertise is telecommunication. Several popular blocks have been implemented by DeDris, which allow rapid development of complex telecommunication systems. DeDris is strongly extending its fields of expertise through in-house R&D and the formation of strategic alliances with scientific and industrial partners. Areas being developed are audio, video and vision, and radar.

Areas of Expertise

The following table of products demonstrates areas of DeDris technical expertise. Xilinx and DeDris are in the process of evaluating these to determine which are suitable as AllianceCORE products. If you have a need for a specific product then contact Dedris for information or availability.

Product	Functional Description	Gates	ROM (kbytes)	RAM (kbytes)
DSP Functions
FFT	Fast Fourier Transform
Speech Recognition	Template-based, speaker-dependent, isolated-word, automatic speech recognition.	9,000	1	--
Pink-noise generator	Low-ripple pink noise filter with filter characteristic of -3 +/-0.08 dB per octave over the bandwidth 20Hz to 20kHz.	4,000	0.1	0.1
Image processing	Several core image processing blocks	--	--	--
CCIR 656/601	Digital video converter : CCIR to raw-video data and vice versa.	1,500	--	--
Triple Des	Triple data-encryption according to standard DES algorithm.
Speech synthesis	Phrase-concatenated speech synthesis.
Communications and Networking
ADPCM	Full-duplex ITU-T G.726 compliant 16, 24, 32 and 40 kbit/s speech-compression encoder/decoder. Operates at 4MHz.	5,200	0.280	0.064
ADPCM-16	Full-duplex 16 channel ITU-T G.726 compliant 16, 24, 32 and 40 kbit/s speech-compression encoder/decoder. Operates at 32MHz.	10,400	0.280	1.024
G.723.1	Low bit-rate ITU compliant speech-compression at 6.3 kbit/s, can be combined with G.723.1A. Operates at 20MHz.	18,000	22	2.3
G.723.1A	Silence compression scheme by voice activity detection and comfort-noise generation, compliant with Annex A of speech-compression standard CODEC G.723.1. Option for G.723.1 with only little additional hardware cost.	--	--	--
G.729	Low bit-rate ITU-T compliant speech-compression codec at 8 kbit/s.
Echo canceler	High-performance Echo-cancellation and suppression processor. Operates at 4MHz.	6,000	0.28	0.150
ECP-16	16-channel high-performance performance echo-cancellation and suppression processor. Operates at 32MHz.	12,000	4.48	2.4
DTMF	Full-duplex DTMF transceiver. Operates at 2 MHz.	4,000	0.28	0.150
Caller-ID	On-hook and off-hook caller line identification. Operates at 4MHz.	6,000	0.28	0.150
Reed Solomon	Full-duplex Reed-Solomon codec.	4,000	0.5	0.2
LU7	A 64 kbit/s data bearer service for DECT/ISDN gateways, performing automatic-repeat requests and RS forward-error control.	5,000	0.6	0.7
V23 modem	ITU-T V23 compliant 1200 baud FSK asynchronous modem.	6,000	0.28	0.15
MELP	Federal standard compliant speech-compression codec at 2.4 kbit/s.
Note: All gate counts are for example implementations and are application dependant.

Contact DeDris Embedded Algorithms BV

Marconistraat 34
4004 JM TIEL
The Netherlands
Phone: +31 344 63 28 38
Fax: +31 344 63 26 31
URL: www.dedris.nl
E-mail: xilinx@dedris.nl

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