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TEST DESCRIPTION |
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PACKAGE/PROCESS |
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Solder Heat Test
(Optional) |
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Immersion in solder @ 260 °C for 12 sec
End-point electrical test @ 25 °C |
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Resist. to Solvents |
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1 dev per chemical for 1 min, then brush 10 times |
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Solderability Test |
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8 hrs steam age: PTH: 245 °C / 5 sec
PSMC: 215 °C for 5 sec (wetting) PSMC: 260 °C for 10 sec (dewetting) |
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Die Shear |
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Die Shear strength > 5.0 kg |
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Ball Shear and
Bond Pull |
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Ballshear strength > 50 gm
Bondpull strength > 5.0 gm |
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External Visual |
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Package defects, Lead defects |
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Internal Visual |
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Die defects, die-attach and wirebond defects |
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S.A.T. and Dye Pen.
Test |
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Scanning Acoustic Tomograpy
60 psig / 2 hrs. Dye Pen. < 10 mils from lead tip |
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Auto Clave (SPP) |
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Preconditioning flow #1 or #2 (for PSMC only)
96 hrs @ 2 ATM with saturated steam @ 121 °C End-point electrical parameter @ 25 °C |
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X-Ray |
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Wire sweep, Pkg void and Epoxy void |
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Flammability |
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Bulk material in C of C per material shipment |
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Lead Matl/Pltg Thick
(Optional) |
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Process
Cross-Section |
Cross Section shall be performed by the fabrication facility or by the Xilinx Process Technology Department. For Qual: all layers are shown with measurements. For Monitors: vias, contacts and metal step coverage measurements are required. |
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MICRO CIRCUIT FAMILY | ||||||||
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High Temp Life Test |
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145 ° C/256/500 and 1000 hrs or equivalent
End-point electrical test @ 25 °C, verify device parameter drift (<10%) |
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Low Temp Life Test |
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< -10 ° C/1000 hrs
End-point electrical test @ 25 °C, verify device parameter drift (<10%) |
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85 °C/ 85% RH |
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Preconditioning flow #1 or #2 (for PSMC only)
End-point electrical test @ 25 °C (for PSMC only) 85 ° C / 85% RH static bias for 168, 500, 1000 hrs End-point electrical test @ 25 °C |
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HAST |
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Preconditioning flow #1 or #2 (for PSMC only)
End-point electrical test @ 25 °C (for PSMC only) HAST -130 °C / 85% RH static bias for 50, 100 hrs End-point electrical test @ 25 °C |
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ESD (HBM) |
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3 +tive and 3 -tive pulses, all pins tested, 2000 volt min. |
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High Temp Storage (Optional) |
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150 °C/500, 1000 hrs
End-point electrical test @ 25 °C |
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PACKAGE DESIGN |
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Phy. Dimension |
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Per applicable pkg outline drawing |
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Lead Integrity |
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Cond. B2 |
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Adhesion of
Lead Finish (Optional) |
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Bend coated lead at an angle of 90 ° until
fracture occurs.
No flaking, peeling or detachment of coating at the interface. |
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Temp Cycle |
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Preconditioning flow #1 or #2 (for PSMC only)
End-point electrical test @ 25 °C (for PSMC only) Cond C -65/150 °C, 500 cycles End-point electrical test @ 25 °C |
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Thermal Shock |
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Cond C, -65/150 °C, 100 cycles
End-point electrical test @ 25 °C |
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ELECTRICAL ENDURANCE / EVALUATION AND PROCESS VALIDATION | ||||||||
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Electrical Test
& Datalog |
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@ 25 °C, minimum and maximum operating temp |
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Electrical
Characterization |
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Shmoo plot and temp trend for critical parameters |
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T.D.D.B. |
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Characterization of oxide integrity |
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Latch-Up |
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a) Immunity to PSOV of 20% over absolute Maximum
voltage
b) Immunity to +/-200mA current injection into I/O pins |
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Electromigration |
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Characterization of Metallisation system
> 100,000 hours for 0.1% cumulative failures > 100,000 hours for 50% cumulative failures |
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Photosensitivity
(Optional) |
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Apply 25W neon bulb, distance = 50 cm during electrical test |
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Data Retention Bake |
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Write device with suitable pattern, bake @
150 °C for 1000 hrs
Read and confirm data pattern End-point electrical test @ 25 °C |
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Input/Output
Capacitance |
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Device shall be biased @ nominal operating voltage |
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Power Cycling |
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5000 cycles @ 50 °C with Vcc = 5.0V
Vpp = 12 to 12.5 V |
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Notes:
1)
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For any Qual or Product Monitor where sample size does not meet the Standard Quality level, approval from product Engineering and Product QA is required. |
2) | The Product Monitor Frequency applies to each package family with assembly locations and package type rotated each Quarter (when applicable). |
3) | The Product Monitor Frequency applies to each Micro Circuit Family, each Quarter. |
4) | For Moisture sensitive PSMC, a bake @ 125 °C for 16 hrs prior to solder heat test is required. |
5) | End-point electrical test shall be performed within 48 hrs window. |
6) | End-point electrical test shall be performed within 96 hrs window. |
7) | For Plastic encapsulated laminated PCB package, use condition B, -55 / 125 °C. |
8) | 85/85 Test is not required if HAST test is used. |
9) | HAST Test data is for information and not required for qualification. |
10) | T.D.D.B. - Time Dependent Dielectric Breakdown. |
11) | Dye Penetration test will be used as verification after S.A.T. |
12) | Interim read point is optional. |
13) | PTH - Plastic Through Hole. |
14) | PSMC - Plastic Surface Mount Component. |
15) | Not applicable to FPGA's; H.T.O.L. test data @ 150 +0/-5 °C may be used to satisfy this requirement. |
16) | In process monitor data may be used to satisfy this qual requirement, refer to assembly lot traveller or FAB/Assembly/Vendor monitor data. |