Table 2A

Plastic Package / Product Monitor Requirements and Test Conditions

TEST SEQ	TEST DESCRIPTION	REFERENCE SPEC Mil-Std-883 / JEDEC/STACK	XILINX	TEST OR STRESS CONDITIONS	PRODUCT MONITOR SAMPLE SIZES			PRODUCT MONITOR FREQUENCY	Notes (#1)
B	PACKAGE/PROCESS				CAT.1	CAT.2	CAT.3
B1	Solder Heat Test (Optional)	JEDEC Std-22 Mtd A112	B1005 RTP0024	Immersion in solder @ 260 °C for 12 sec End-point electrical test @ 25 °C	-			For Qualification only	#4
B2	Resist. to Solvents	Mil-Std-883 Mtd 2015	B1026	1 dev per chemical for 1 min, then brush 10 times	0/3			In-line Process Monitor + 1x / 3 months	#2, #16
B3	Solderability Test	Mil-Std-883 Mtd 2003 STACK 0001 Test 5	B1023 RTP0024	8 hrs steam age: PTH: 245 °C / 5 sec PSMC: 215 °C for 5 sec (wetting) PSMC: 260 °C for 10 sec (dewetting)	0/22 (3 units)			In-line Process Monitor + 1x / 3 months	#2, #13, #14, #16
B4	Die Shear	Mil-Std-883 Mtd 2019		Die Shear strength > 5.0 kg	0/5			In-line Process Monitor	#16
B5	Ball Shear and Bond Pull	STACK 0001 Test 6	B1004	Ballshear strength > 50 gm Bondpull strength > 5.0 gm	0/10 (2 units) 0/8 (2 units)			In-line Process Monitor	#16
B6	External Visual	Mil-Std-883 Mtd 2009		Package defects, Lead defects	0/25			In-line Process Monitor	#16
B7	Internal Visual	Mil-Std-883 Mtd 2010		Die defects, die-attach and wirebond defects	0/5			In-line Process Monitor	#16
B8	S.A.T. and Dye Pen. Test	-		Scanning Acoustic Tomograpy 60 psig / 2 hrs. Dye Pen. < 10 mils from lead tip	0/5			For Qualification and Monitor	#11, #16
B9	Auto Clave (SPP)	JEDEC Std-22 Mtd A102	RTP0002	Preconditioning flow #1 or #2 (for PSMC only) 96 hrs @ 2 ATM with saturated steam @ 121 °C End-point electrical parameter @ 25 °C	LTPD 5 0/45	LTPD 7 0/32	LTPD 10 0/22	1x / 3 months	#2, #6, #14
B10	X-Ray	-		Wire sweep, Pkg void and Epoxy void	0/5			In-line Process Monitor	#16
B11	Flammability	UL-94 V0		Bulk material in C of C per material shipment	-				#16
B12	Lead Matl/Pltg Thick (Optional)				-
B13	Process Cross-Section			Cross Section shall be performed by the fabrication facility or by the Xilinx Process Technology Department. For Qual: all layers are shown with measurements. For Monitors: vias, contacts and metal step coverage measurements are required.	-
C	MICRO CIRCUIT FAMILY
C1-A	High Temp Life Test	Mil-Std-883 Mtd 1005	RTP0003	145 ° C/256/500 and 1000 hrs or equivalent End-point electrical test @ 25 °C, verify device parameter drift (<10%)	LTPD 5 0/45	LTPD 7 0/32	LTPD 10 0/22	1x / 3 months	#3, #6, #12
C1-B	Low Temp Life Test	Mil-Std-883 Mtd 1005		< -10 ° C/1000 hrs End-point electrical test @ 25 °C, verify device parameter drift (<10%)	-			For Qualification only	#16
C2-A	85 °C/ 85% RH	JEDEC Std-22 Mtd A101	RTP0006	Preconditioning flow #1 or #2 (for PSMC only) End-point electrical test @ 25 °C (for PSMC only) 85 ° C / 85% RH static bias for 168, 500, 1000 hrs End-point electrical test @ 25 °C	LTPD 5 0/45	LTPD 7 0/32	LTPD 10 0/22	1x / 3 months	#2, #5, #8, #12, #14
C2-B	HAST	JEDEC Std-22 Mtd 110	RTP0011	Preconditioning flow #1 or #2 (for PSMC only) End-point electrical test @ 25 °C (for PSMC only) HAST -130 °C / 85% RH static bias for 50, 100 hrs End-point electrical test @ 25 °C	LTPD 10 0/22	LTPD 15 0/15	LTPD 20 0/11	1x / 3 months	#2, #5, #9, #14
C3	ESD (HBM)	Mil-Std-883 Mtd 3015	TSP0001 RTP0032	3 +tive and 3 -tive pulses, all pins tested, 2000 volt min.	-			For Qualification only
C4	High Temp Storage (Optional)	Mil-Std-883 Mtd 1008	RTP0028	150 °C/500, 1000 hrs End-point electrical test @ 25 °C	-			For Qualification only	#12
D	PACKAGE DESIGN				CAT.1	CAT.2	CAT.3
D1	Phy. Dimension	Mil-Std-883 Mtd 2016	B1027	Per applicable pkg outline drawing	0/5			1x / 3 months	#2
D2	Lead Integrity	Mil-Std-883 Mtd 2004	B1024	Cond. B2	0/15 (3 units)			1x / 3 months	#2
D7	Adhesion of Lead Finish (Optional)	Mil-Std-883 Mtd 2025	B1018	Bend coated lead at an angle of 90 ° until fracture occurs. No flaking, peeling or detachment of coating at the interface.	-			For Qualification only
D9	Temp Cycle	Mil-Std-883 Mtd 1010	PSP822 RTP0022	Preconditioning flow #1 or #2 (for PSMC only) End-point electrical test @ 25 °C (for PSMC only) Cond C -65/150 °C, 500 cycles End-point electrical test @ 25 °C	LTPD 5 0/45	LTPD 7 0/32	LTPD 10 0/22	1x / 3 months	#2, #7 #14
D10	Thermal Shock	Mil-Std-883 Mtd 1011	RTP0001	Cond C, -65/150 °C, 100 cycles End-point electrical test @ 25 °C	LTPD 5 0/45	LTPD 7 0/32	LTPD 10 0/22	1x / 3 months	#2, #7
E	ELECTRICAL ENDURANCE / EVALUATION AND PROCESS VALIDATION
E1	Electrical Test & Datalog	STACK 0001, Test 1c		@ 25 °C, minimum and maximum operating temp	0/10			New Product Characterization
E2	Electrical Characterization	STACK 0001, Test 1d	TSP0003	Shmoo plot and temp trend for critical parameters	-			New Product Characterization
E3	T.D.D.B.	STACK 0001, Test 38		Characterization of oxide integrity				In-line Process Monitor	#10, #16
E4	Latch-Up	Jedec STD 17	TSP0006	a) Immunity to PSOV of 20% over absolute Maximum voltage b) Immunity to +/-200mA current injection into I/O pins				New Product Characterization
E5	Electromigration	STACK 0001, Test 39		Characterization of Metallisation system > 100,000 hours for 0.1% cumulative failures > 100,000 hours for 50% cumulative failures				In-line Process Monitor	#16
E6	Photosensitivity (Optional)	STACK 0001, Test 37		Apply 25W neon bulb, distance = 50 cm during electrical test				New Product Characterization
E7	Data Retention Bake	Mil-Std-883 Mtd 1033	RTP0028	Write device with suitable pattern, bake @ 150 °C for 1000 hrs Read and confirm data pattern End-point electrical test @ 25 °C	-			New Product Characterization	#15
E8	Input/Output Capacitance	Mil-Std-883 Mtd 3012	RTP0031	Device shall be biased @ nominal operating voltage	-			New Product Characterization
E9	Power Cycling		RTP0029	5000 cycles @ 50 °C with Vcc = 5.0V Vpp = 12 to 12.5 V	-			New Product Characterization

Notes:

1)
For any Qual or Product Monitor where sample size does not meet the Standard Quality level, approval from product Engineering and Product QA is required.

2) The Product Monitor Frequency applies to each package family with assembly locations and package type rotated each Quarter (when applicable).

3) The Product Monitor Frequency applies to each Micro Circuit Family, each Quarter.

4) For Moisture sensitive PSMC, a bake @ 125 °C for 16 hrs prior to solder heat test is required.

5) End-point electrical test shall be performed within 48 hrs window.

6) End-point electrical test shall be performed within 96 hrs window.

7) For Plastic encapsulated laminated PCB package, use condition B, -55 / 125 °C.

8) 85/85 Test is not required if HAST test is used.

9) HAST Test data is for information and not required for qualification.

10) T.D.D.B. - Time Dependent Dielectric Breakdown.

11) Dye Penetration test will be used as verification after S.A.T.

12) Interim read point is optional.

13) PTH - Plastic Through Hole.

14) PSMC - Plastic Surface Mount Component.

15) Not applicable to FPGA's; H.T.O.L. test data @ 150 +0/-5 °C may be used to satisfy this requirement.

16) In process monitor data may be used to satisfy this qual requirement, refer to assembly lot traveller or FAB/Assembly/Vendor monitor data.

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents

1)	For any Qual or Product Monitor where sample size does not meet the Standard Quality level, approval from product Engineering and Product QA is required.
2)	The Product Monitor Frequency applies to each package family with assembly locations and package type rotated each Quarter (when applicable).
3)	The Product Monitor Frequency applies to each Micro Circuit Family, each Quarter.
4)	For Moisture sensitive PSMC, a bake @ 125 °C for 16 hrs prior to solder heat test is required.
5)	End-point electrical test shall be performed within 48 hrs window.
6)	End-point electrical test shall be performed within 96 hrs window.
7)	For Plastic encapsulated laminated PCB package, use condition B, -55 / 125 °C.
8)	85/85 Test is not required if HAST test is used.
9)	HAST Test data is for information and not required for qualification.
10)	T.D.D.B. - Time Dependent Dielectric Breakdown.
11)	Dye Penetration test will be used as verification after S.A.T.
12)	Interim read point is optional.
13)	PTH - Plastic Through Hole.
14)	PSMC - Plastic Surface Mount Component.
15)	Not applicable to FPGA's; H.T.O.L. test data @ 150 +0/-5 °C may be used to satisfy this requirement.
16)	In process monitor data may be used to satisfy this qual requirement, refer to assembly lot traveller or FAB/Assembly/Vendor monitor data.