![]() |
|
![]() ![]() ![]() ![]() ![]() ![]() ![]() |
|
TEST DESCRIPTION |
|
|
|
|
|
|
||
|
PACKAGE/PROCESS |
|
|
|
|||||
|
Solder Heat Test (Optional) |
|
|
Immersion in solder @ 260 °C for 12 sec
End-point electrical parameter @ 25 °C |
|
|
|||
|
Resist. to Solvents |
|
|
1 dev per chemical for 1 min, then brush 10 times |
|
|
|||
|
Solderability Test |
|
|
8 hrs steam age: TH: 245 °C / 5 sec
SMC: 215 °C for 5 sec (wetting) SMC: 260 °C for 10 sec (dewetting) |
|
|
|
||
|
Die Shear / Stud Pull |
|
|
Die Shear strength > 5.0 kg |
|
|
|
||
|
BondPull |
|
|
Bondpull strength > 2 gm |
|
|
|
||
|
External Visual |
|
|
Package defects, Lead defects |
|
|
|
||
|
Internal Visual |
|
|
Die defects, die-attach defects and wirebond defects |
|
|
|
||
|
Lead Material/Plating
Thickness (Optional) |
|
|||||||
|
Process Cross Section | Cross Section shall be performed by the fabrication facility or by the Xilinx Process Technology Department. For Qual: all layers are shown with measurements. For Monitors: vias, contacts and metal step coverage measurements are required. |
|
||||||
|
MICRO CIRCUIT FAMILY | ||||||||
|
High Temp Life Test |
|
|
125 °C / 168, 500 and 1000 hrs or equivalent
End-point electrical test @ 25 °C, verify device parameter drift (<10%) |
|
|
|
|
|
|
Low Temp Life Test |
|
|
< -10 ° C/1000 hrs
End-point electrical test @ 25 °C, verify device parameter drift (<10%) |
|
|
|
||
|
ESD (HBM) |
|
|
3 +ve and 3 -ve pulses, all pins tested, 2000 volts min. |
|
|
|||
|
High Temp Storage
(Optional) |
|
|
150 °C / 500, 1000 hrs
End-point electrical test @ 25 °C |
|
|
|||
|
PACKAGE DESIGN | ||||||||
|
Phy. Dimension |
|
|
Per applicable pkg outline drawing
|
|
|
|
||
|
Lead Integrity
Seal (Fine/Gross) |
|
|
Cond. B2 (Use Cond. B1 for leaded chip carrier
pkgs
Cond. A, Tracer gas (he) fine leak & Cond. C, Perfluorocarbon gross leak |
|
|
|
||
|
Thermal Shock +
Temp Cycle + Moisture Resistance Seal (Fine/Gross) |
|
|
Cond C, -65/150 °C (Liquid to Liquid),
15 cycles
Cond C, -65/150 °C (Air to Air), 100 cycles 90% RH/ -10/25/65 °C, 10 cycles Cond. A, Tracer gas (he) fine leak & Cond. C, Perfluorocarbon gross leak |
|
|
|
||
Visual Examination |
|
|
Per visual criteria in Method 1011 and Method
1004
End-point electrical Test @ 25 °C |
||||||
|
Mechanical Shock +
Variable Freq. Vibration + Constant Acceleration Seal (Fine/Gross) |
|
|
Cond. B, 1500 G Peak, 0.5 msec pulse duration
Cond. A, at peak acceleration of 20 g Cond. E - For Pkg < 5 gms or inner sealed cavity < 2 inches Cond. D - For Pkg >= 5 gms or inner sealed cavity >= 2 inches Cond. A, Tracer gas (he) fine leak & |
|
|
|
||
Visual Examination |
|
|
Cond. C, Perfluorocarbon gross leak
Per visual criteria in Method 1011 and Method 1004 End-point electrical test @ 25 °C |
||||||
|
Salt Atmosphere
Visual Examination Seal (Fine/Gross) |
|
|
Cond A, soak time = 24 hrs
Per visual criteria in method 1009 Cond A, Tracer gas (he) fine leak & Cond C, Perfluorocarbon gross leak |
|
|
|||
|
Internal Vapor Content |
|
|
5000 ppm max. at 100 °C |
|
|
|
||
|
Adhesion of L/Finish
(Optional) |
|
|
Bend Coated lead at an angle of 90° until
fracture occurs.
No flaking, peeling or detachment of coating at the interface. |
|
|
|||
|
Lid Torque |
|
|
Applicable to Glass Frit Sealed Package only
The Torque value must meet the minimum limits as specified in Table #1 of the Mil-Std-883 Method 2024.2 |
|
|
|
||
|
Temp Cycle
Seal (Fine/Gross) |
|
|
Cond C -65/150 °C, 500 cycles
Cond A, Tracer gas (he) fine leak & Cond C, Perfluorocarbon gross leak End-point electrical test @ 25 °C |
|
|
|
|
|
|
ELECTRICAL ENDURANCE/EVALUATION & PROCESS VALIDATION DATA | ||||||||
|
Electrical Test
& Datalog |
|
@ 25 °C, Top min. & Top max. |
|
|
||||
|
Electrical
Characterization |
|
Schmoo plot & Temperature trends for critical parameters |
|
|
||||
|
T.D.D.B. |
|
Characterization of oxide integrity |
|
|
|
|||
|
Latch-Up |
|
|
a) Immunity to PSOV of 20% over absolute Maximum
voltage
b) Immunity to +/-200mA current injection into I/O pins |
|
|
|||
|
Electromigration |
|
Characterization of Metallisation system
> 100,000 hours for 0.1% cumulative failures > 100,000 hours for 50% cumulative failures |
|
|
|
|||
|
Photosensitivity
(Optional) |
|
Apply 25W neon bulb, distance = 50 cm during electrical test. |
|
|||||
|
Data Retention Bake |
|
|
Write device with suitable pattern, bake @
150 °C for 1000 hrs
Read and confirm data pattern End-point electrical test @ 25 °C |
|
|
|
||
|
Input/Output
Capacitance |
|
|
Biased @ nominal operating voltage |
|
|
|||
|
Power Cycling |
|
5000 cycles @ 50 °C with Vcc = 5.0V
Vpp = 12 to 12.5 V |
|
|
1)
|
For any Qual or Product Monitor where sample size does not meet the Standard Quality level, approval from product Engineering and Product QA is required. | |||
2) | The Product Monitor Frequency applies to each package family with assembly locations and package type rotated each Quarter (when applicable). If only one package type exists within a package family, the product monitor frequency will be 1x / 12 months, minimum. | |||
3) | The Product Monitor Frequency applies to each Micro Circuit Family. Plastic monitor data may be used to satisfy this requirement. | |||
4) | End-point electrical test shall be performed within 48 hrs window. | |||
5) | Interim read point is optional. | |||
6) | The sample size is for numbers of bonds or numbers of leads. | |||
7) | For LCC packages, use LTPD 15, 15 (0,1). | |||
8) | Military QCI monitor data may be used to satisfy this requirement. | |||
9) | End-point electrical test @ 25 °C shall be performed within 48 hrs after moisture resistance test. | |||
10) | T.D.D.B. - Time Dependent Dielectric Breakdown | |||
11) | In process monitor data may be used to satisfy the Qual requirement; refer to Assy Qual lot traveller or Fab monitor data. | |||
12) | Not applicable to FPGA's; H.T.O.L. test data @ 150 +0/-5 °C may be used to satisfy this requirement. |