System Explorer

Aptix Corporation
2880 North First Street
San Jose, CA 95134 U.S.A.
Tel: 1-408-428-6200
Fax: 1-408-944-0646
info@aptix.com
http://www.aptix.com

Aptix Corporation is the leading supplier of rapid system prototyping and emulation solutions. Aptix's unique solution is based on a reprogrammable emulator architecture that incorporates Field Programmable Interconnect Components and Field Programmable Circuit Boards, and the accompanying software to emulate a complete system. Emulation is critical for the verification of complex designs, especially in environments where images, sound, protocols, and subjective judgment comprise the validation domain.

The System Explorer Series extends emulation into real-time verification of software and hardware for embedded systems. System Explorer is based on an open architecture that offers the ability to simultaneously emulate the FPGAs with DSPs, microcontrollers, microprocessors, FPGAs, ASSPs, and bonded-out cores while executing the accompanying software in real-time. This allows algorithms to be fully qualified and tested within the system context before the design is sent to fabrication.

The System Explorer software automatically imports standard netlist formats, routes and downloads the interconnect components and FPGAs, and sets up signal probes for logic analysis. The debugging interface permits complete observability of any node in the design. System Explorer is available in both node-locked and multi-user floating network configurations.

Product Highlights

• Open architecture for new technologies
• Fully reprogrammable and observable
• High speed validation integrate real-time interfaces and allows hardware/software co-design

Xilinx-Specific Highlights

• Supports all Xilinx devices
• XNF netlist import
• Automatic FPGA configuration

Design Flow

The hierarchical design is created in HDL and synthesized; each hierarchical block is targeted for an FPGA. The synthesis program produces the XNF netlists for the individual FPGAs as well as a top-level netlist describing the interconnection between the FPGAs. The FPGA netlists are then run through XACT place and route to produce the configuration information for the Xilinx FPGAs. The Aptix Axess software uses the top-level netlist and the placement information of the FPGAs and other devices to route the FPIC devices. Finally, the configuration information is downloaded from the workstation, through dedicated programming hardware, to the FPGA and FPIC devices in the emulation hardware.