Elanix is dedicated to providing designers of communications and DSP applications with tools that enable the rapid evaluation of design trade-offs early in the development cycle. SystemView by Elanix is a system-level design tool that allows designers to quickly build and simulate block diagram representations of their applications. SystemView supports the simulation of high-level communications functions, as well as DSP and RF/Analog applications. SystemView's simulation performance is very fast compared to other tools enabling designers to perform 'what-if' analysis 
very quickly to determine the optimum implementation for DSP and communications functions. Particularly important for Xilinx customers is SystemView's support for bit-true DSP simulation. Since FPGAs can support any bit-width, it is often possible to lower gate counts and cost by 
reducing the number of bits a DSP function operates on. SystemView's bit-true simulation allows the designer to quickly determine the fewest bits required to meet the required accuracy. SystemView is tightly integrated with Xilinx's DSP IP cores and core generator. A library of tokens representing Xilinx DSP cores is provided. Once the design has been completed in SystemView, the designer simply select an option to program the Xilinx DSP cores. SystemView then automatically passes the parameters to the Xilinx core generator.