Handel-C is the core product of Embedded Solutions.  It is a CASE tool for hardware design, which enables a software engineer to target directly FPGAs in a similar fashion to classical microprocessor cross-compiler development tools, without resource to a Hardware Description Language.  Either a software or hardware engineer may use it, for Reduced Development Time, Improved Design Re-use, Improved Design Productivity, or Rapid Prototyping. 

The company offers a small range of FPGA based co-processor boards for PCs, these boards may be used for low volume bespoke real-time applications and for prototyping other FPGA based designs. 

The company offers a broad range of services based on the use of the Handel-C took, notably: 

• Porting and development to enable the tools to target Original Equipment Manufacturers' FPGA based hardware.
• Porting of microprocessor based applications and libraries to FPGAs.
• Development of re-usable embedded hardware and software libraries such as for re-usable macro-cells and module libraries.
• Integration of the Handel-C tool with VHDL or Verilog, so that developers can use Handel-C as a new front-end tool, followed by their existing VHDL or Verilog tool flow for FPGA or ASIC design.
• Training.

• Handel-C is a programming language for hardware design.
• Subset of ANSI C, with extension to support concurrency and channel I/O, and variable word length.
• Based on the well-proven CSP (Communicating Sequential Processes) model.
• Hardware optimising compiler.
• Full simulation of variable but widths in the hardware implementation.

Xilinx-Specific Highlights

• Today, the Handel-C toolset us uniquely available for the following Xilinx devices for families:  XC3000, XC4000

The Handel-C toolset uses the advanced approach of a programming language for hardware compilation.  Programming languages have proven themselves as carriers for the most complicated designs ever produced by mankind.  By using a programming language for hardware compilation it addresses the need for a new design approach to support the ever-increasing density of gates being made available.  It also addresses the need for a higher level of abstraction to the design process, and so helps overcome the skill shortage of hardware description language programmers. 

The output of the compiler is a netlist that feeds into the manufacturers place and route tool, to produce the FPGA personality file.  The toolset includes an in-built hardware optimiser and a simulator.