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Logic Compressor
Epsilon Design Systems, Inc.
134 Meadowland Drive
Milipitas, CA 95035 U.S.A.
Tel: 1-408-934-1536
Fax: 1-408-934-1536
epsilonEDS@aol.com
http://users.aol.com/epsilonEDS
Epsilon's Logic Compressor offers the most powerful optimization engine
for FPGA designs. The software is based on the Epsilon's architecture-specific
optimization technology. It reads XNF netlists, optimizes and produces
optimized XNF files that can be read by Xilinx's PPR. It can also read
and write EDIF netlists. The output XNF files may include attributes which
can speed up Xilinx's PPR program and produce better results.
Product Highlights
- Produces much faster and smaller designs than other synthesis tools
- Shorter run times
- Easily plugs into current design flows
- Reads and writes XNF or EDIF
Xilinx-Specific Highlights
- Supports XC3000, XC4000, and XC5000 devices
- Faster and better results than Improvex
Design Flow
- Because Logic Compressor reads and writes EDIF and XNF file formats,
it can be used to improve the design quality before X-BLOX or PPR.
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