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Escalade

DesignBook

Escalade Corporation
2475 Augustine Drive
Santa Clara, CA 95054
Tel: 1-408-654-1600
Fax: 1-408-654-1616
info@escalade.com

DesignBook, based on the concept of a designer's notebook, offers an integrated set of design capture tools to fully capture design intent, including functionality, implementation constraints, simulation stimulus and X-BLOX library elements. Once design intent is captured, HLDA methods are supported by design management tools which provide interfaces to and tuning for popular simulation and synthesis tools and the Xilinx XACTstep design environment.

For design function capture, DesignBook has graphically oriented editors based on intuitive design techniques, including: State Machine Designer for control logic; Block Designer for parameterized block diagrams; and Language Designer for Verilog or VHDL entry. Validation Suite Designer handles design timing by providing an advanced, intuitive stimulus and timing waveform editor and post-simulation results analysis processor. Constraint Designer centrally captures and manages all implementation constraints.

DesignBook provides a selection of tuned interfaces to VHDL and Verilog HDL simulators, synthesis tools, and physical design tools known as Commanders. Commanders output HDL that has been tailored to specific downstream tools or silicon technologies; constraints formatted to the requirements of downstream; execution scripts; and design management functionality. Commanders also provide back annotation mechanisms and results-analysis capabilities.

Product Highlights

  • Provides high-level design productivity enhancements to Xilinx chip development
  • Provides methodology support to speed time-to-market
  • Allows greater design exploration
  • Supports popular VHDL and Verilog simulation and synthesis tools
  • Allows mixed implementations between synthesized logic and X-BLOX components
  • Available on Sun and PC

Xilinx-Specific Highlights

  • Supports X-BLOX components for technology dependent implementation
  • Provides X-BLOX simulation models to support pre-XACTstep chip validation
  • Integrates with Xilinx XACTstep development environment
  • Supports Xilinx XC4000 and XC5000 product families


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