FS-ATG
Flynn Systems Corporation
74 Northeastern Blvd., Building 16
Nashua, NH 03062 U.S.A.
Tel: 1-603-598-4444
Fax: 1-603-598-4111
support@flynn.com
FS-ATG is an automatic test vector generation software program for PLDs,
including Xilinx FPGAs and EPLDs. Generated test vectors may be applied
on a logic programmer, component tester, or in-circuit board tester. They
may also be used as inputs to PLD design software packages.
FS-ATG includes several utilities that perform logic analysis and device
simulation. With FS-ATG's powerful design-for-testability tools, time-to-market
can be substantially reduced. Optional modules provide support for various
PALs, GALs, FPGAs, EPLDs, and CPLDs.
Product Highlights
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Fault scores and simulates externally generated test vectors
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Navigates through a device's logic via the modeled faults
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Performs a step-by-step logic simulation
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Operates in DOS and SCO-UNIX
Xilinx-Specific Highlights
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Generates test vectors for Xilinx FPGAs and EPLDs
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Produces high fault-coverage test vectors
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Advanced logic analysis and device simulation features help engineers add
testability into their designs
Design Flow
FS-ATG inputs the design's .XNF file. The user specifies special constraints,
such as pins to be connected, ignored, or forced high and low.
Two methods of test are available for Xilinx devices: a full-functional
test of the device or use of a substitute test circuit. FS-ATG outputs
test vectors in several different formats depending on how they will be
used. These test vectors are race free and provide high fault coverage
on the Xilinx device. |
