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CUPL
Logical Devices, Inc.
130 Capital Drive
Golden, CO 80401 U.S.A.
Tel: 1-303-279-6868
Fax: 1-303-279-6869
Europe
STAG Programmers
Tel: (44) 01707 332148
Japan
Synerdyne
Tel: (033) 754-5350
CUPL (Compiler, Universal for Programmable Logic) is a powerful high-level,
universal design software package for PLD and FPGA devices. CUPL offers
a variety of design entry formats, true C-like language flexibility, logic
minimization, DeMorgan expansion, functional simulation, multiple device
partitioning, and architecture/technology-independent design development.
CUPL Total Designer supports all Xilinx devices. For Xilinx FPGAs, CUPL
produces an XNF file that has been optimized with ImproveX. It can then
be used as input to XACTstep software for placement and routing. Xilinx
EPLD devices are supported with the Xilinx XEPLD fitter. This incorporates
logic design capability along with Xilinx software.
Product Highlights
- High-level language with state machine
- Windows and DOS versions
- Waveform simulation
- Many schematic interfaces
- All fitters included
Xilinx-Specific Highlights
- Supports XC3000, XC4000 and XC7000 device families
- Produces complete FPGA design; no schematic needed
- Produces optimized XNF ready for XACTstep software
- Tightly integrated Xilinx EPLD support with XEPLD fitter
Design Flow
- You enter a design using the graphical state machine entry tool, schematic,
or text editor.
- The state machine or schematic is translated into a CUPL source file
by its respective interface tools.
- This file is then compiled using the CUPL compiler. CUPL will automatically
invoke ImproveX or the XEPLD fitter depending on the device selected. The
resulting file is either an XNF file or a PRG file for programming as appropriate.
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