StateCAD

Visual Software Solutions
3057 Coral Springs Drive #203
Coral Springs, FL 33065 U.S.A.
Tel: 1-954-346-8890
Fax: 1-954-346-9394
Order: 1-800-208-1051
rescoto@attmail.com

StateCAD is a graphical ""front-end"" for state machine design and HDL generation including VHDL, Verilog, and Abel. StateCAD is used to produce state machines, which generate error-free HDL. Also, StateCAD easily creates document quality drawings by combining objects such as states, transitions, logic, and busses. Furthermore, StateCAD's enhanced error analysis locates problems such as stuck-at states, multiple output drivers, and multiple default states or transitions.

Product Highlights

• Performs automatic design analysis and identifies over 100 design problem types
• Generates error-free VHDL, Verilog, and Abel
• Generates document quality drawings
• Operates on all Windows platforms, as well as Sun OS and Solaris

Xilinx-Specific Highlights

• Automatically implements one-hot encoded state machines for maximum performance
• Manual encoding also available for smaller state machines
• Logic synthesis is performed using Xilinx's approved optimization hardware

Design Flow

State diagrams are easily created by placing objects, such as states, transitions, logic and text, on the screen.