FPGA Express and FPGA
Compiler
Synopsys, Inc.
700 East Middlefield Road
Mountain View, CA 94043-4033 U.S.A.
Tel: 1-415-962-5000
Fax: 1-415-965-8637
designinfo@synopsys.com
http://www.synopsys.com
Synopsys, Inc. (Nasdaq:SNPS) is a leading supplier of electronic design
automation (EDA) solutions to the global electronics market. The company
provides comprehensive design technologies to creators of advanced integrated
circuits, electronic systems, and systems on a chip. Synopsys also provides
consulting services and support to its customers to streamline the overall
design process and accelerate time to market.
FPGA Express
Product Highlights
-
Features an easy-to-use and learn design centric graphical user interface
-
Performs architecture-specific optimization ensuring efficient use of silicon
resources for both area and performance
-
Integrates with existing Xilinx design entry, verification and place-and-route
tools
-
Synthesizes from industry-standard VHDL and Verilog HDL input
-
Runs on Windows ‘95 and Windows NT-based Personal Computers
Xilinx-Specific Highlights
-
Supports Xilinx XC3X00/A, XC4000E, XC4000EX, XC5200 and XC9500
-
Optimizes for the target Xilinx architecture, including automatic module
generation, for best performance and area
-
Customized interface to XACTstep - annotates synthesis timing constraints
forward via XNF interface
Design Flow
First, specify your design in VHDL or Verilog. Then, verify the description
functionality using a simulator of choice. Once validated, enter desired
design requirements and the target device through the spreadsheet in FPGA
Express to obtain an architecture-specific optimized FPGA netlist. Coupled
with the built-in module generator which employs strategies for using special
features of the target architecture to build complex logic functions, FPGA
Express renders area-efficient and high-performance circuits. To maximize
device performance and routing efficiency, FPGA Express passes timing constraints
to the Xilinx XACTstep software. Post-layout verification may be performed
using a simulator of choice or within the Xilinx design environment prior
to device programming.
FPGA Compiler
Product Highlights
-
Provides high-level design methodology addressing reduced time-to-market
needs of FPGA designers
-
Enables rapid FPGA prototyping with a transparent migration path to ASICs
-
Synthesizes from industry-standard VHDL and Verilog HDL input
-
Available on popular UNIX-based workstations
Xilinx-Specific Highlights
-
Supports Xilinx XC3000/A, XC3100, XC4000/E, XC4000EX, XC5200, XC6200, XC7300,
and XC9500
-
Optimizes Xilinx XC4000 CLB and IOB structures and lookup tables for XC3X00
and XC5200
-
Maps directly to Xilinx X-BLOX functions
-
Annotates synthesis timing constraints forward to XACTstep via XNF interface
Design Flow
First, specify your design in VHDL or Verilog. Then, verify the description
functionality using Synopsys' VHDL System Simulator (VSS). Once validated,
FPGA Compiler synthesizes the design into a FPGA netlist. It optimizes
the CLB and IOB structures and the clock enable logic of the XC4000 family,
or lookup tables for other families, to render high-performance, area-efficient
designs. FPGA Compiler also uses the arithmetic logic of the architecture
through automatic inferencing of X-BLOX functions. To maximize device performance
and routing efficiency, FPGA Compiler passes timing constraints to the
Xilinx XACTstep software. Post-layout timing data may be imported into
FPGA Compiler for static timing analysis to verify that the design meets
timing constraints and into VSS for dynamic gate-level simulation with
full timing prior to device programming.
|
FREE!