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 CONCEPT-HDL: Is Cadence's PE 13.x Concept-HDL supported? 
 
 Record #4086
Problem Title: 
CONCEPT-HDL: Is Cadence's PE 13.x Concept-HDL supported?  
 
 
Problem Description: 
Urgency: Standard 
 
General Description: 
When will Cadence's Concept-HDL be supported? 
 
 
 
Solution 1: 
 
Cadence Concept Support Plan 
---------------------------- 
Cadence is in the process of moving customer from Concept-SCALD to 
Concept-HDL (both are schematic entry tools).  Concept-HDL is the new 
flow providing direct HDL interface supporting backannotation, preserve 
hierachical block and mixed flow.  All the customers are expected to 
be moved to Concept-HDL by the end of '99. 
 
The Concept-SCALD to Concept-HDL transition plan is: 
 
1. 97a - Concept-SCALD only.  Xilinx M1.5 support for Concept-SCALD. 
      (current) 
2. PE13.0 - Concept-HDL and Concept-SCALD.  No current support 
3. PE13.5 - Concept-HDL and Concept-SCALD.  Limited Alliance 1.5 support; 
        Contact Hotline for libraries.  Full Xilinx  Alliance 2.1 support for 
        Concept-HDL. (Q2'99) 
4. PE13.6 - Concept-HDL and Concept-SCALD. Limited Alliance 1.5 support; 
        Contact Hotline for libraries.  Full Xilinx  Alliance 2.1 support for 
        Concept-HDL. (Q2'99) 
5. PE14.0 - Concept-HDL only.  Xilinx M2.1 support for Concept-HDL. 
 
Xilinx devices support for Cadence is as follows: 
 
1. Spartan, Spartanxl, 3000a/3100a, 4000e, 4000x (4000ex, 4000xl, 
      and 4000xla), 5200, and 9500, 9500xl is supported in Concept-SCALD 
      97a. 
2. Virtex and all above devices will be "tactically" supported in PE 13.5 
      Concept-HDL.  The tactical support includes some SQA.  Users can get 
      the Xilinx Concept-HDL patch from Xilinx hotline.  There will be limited 
      support from AE. 
3. M2.1 will provide full support of PE13.5 Concept-HDL flow. This means 
      that SQA will be performed and AE will support the flow. 
 
 
 
 End of Record #4086 - Last Modified: 06/22/99 10:27  |