|  VHDL Methodology: Advanced 
      Coding Issues v2.1i  
       Software & Version: 
        N/A 
       
      Audience  
        Intermediate to advance VHDL users, 1 to 
        3 years experience.  
      Prerequisites  
        Basic VHDL 
       
      What is the level of the material? 
         
        Level II - Intermediate  
       
      Training Duration  
        1 Hour 
       
      Content Description  
        This ‘Advanced Coding Issues’ module provides 
        suggestions and guidelines for     effective VHDL 
        coding for statements and operations that must be done within the body 
        of the process.  It also introduces the concept of ‘generate’ statements.  
        A detailed discussion of LFSR counters is given.  
       
      Objectives 
         After completing this training, student will be able to: 
      
        - Write ‘generate’ statement for logic 
          structure  
 
        -   Code for ‘one to many’ LFSR counter.  
        
 
        -   Code for ‘many to one’ style LFSR 
          counter.  
 
        -  Write ‘conditional signal assignment’.  
        
 
        -   Write ‘selected signal assignment’. 
        
 
       
        Topics or Training Outline 
       
      
         Generate Statements  
           
           Choosing LFSR style  
           
           Coding LFSRs   
           Concurrent Statements  
       
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