Xilinx Reed-Solomon Tutorials and Testbenches

Tutorials Two downloadable tutorials are available to help introduce new users to the Xilinx Reed-Solomon encoder and decoder LogiCOREs. They show how to: Specify, generate and download the cores using the web-based configuration GUIs Push the cores through the Xilinx implementation tools Simulate the cores in Modelsim using VHDL testbenches

The tutorials use a simple image encoding/decoding application to help introduce the basic concepts of the Reed-Solomon encoding and decoding processes, so should also be useful if you are new to Reed-Solomon error control coding.

Each tutorial should take about 1.5 hours to complete, assuming you have all the necessary tools installed (see Getting started section in the tutorial worksheets). We recommend that Tutorial 1 is completed before starting Tutorial 2. If you decide to do Tutorial 2 only, you should at least read through Tutorial 1.

Click on the links to view the tutorials now: Tutorial 1 - working with the encoder core Tutorial 2 - working with the decoder core

Testbenches

If you don't want to do the tutorials but would like to have a look at the VHDL testbenches used in the tutorials, click on the following links: tb_rs_encoder.vhd tb_rs_decoder.vhd

The following support files are required for the above testbenches: utils_pkg.vhd pgm_pkg.vhd random.vhd