SAN JOSE, Calif., November 16, 1999—Xilinx, Inc. (NASDAQ:XLNX) today announced it has received a $2.7 million grant from the Defense Advanced Research Projects Agency (DARPA) to develop a comprehensive suite of tools that can be used to create applications that can reconfigure FPGA-based hardware during runtime when a deployed system is operating. Xilinx is working with Virginia Polytechnic Institute (Blacksburg, Va.), on the two-year, joint research and development project. 

The foundation for the tools will be the XilinxÒ JBits Application Programming Interface (API), which Xilinx announced in 1998 to help designers build systems that can be upgraded after installation at a customer's premises. The JBits API is implemented in the Java programming language and permits software to directly access all of the configurable elements in Xilinx FPGAs. 

"Our goal is to use an approach such as the JBits API for direct compilation and configuration of FPGAs in systems," said Steven Guccione, senior staff engineer at Xilinx. "We believe it's possible to use this enabling technology to build a complete set of tools that will provide an environment similar to that available for modern software development systems. The tools and supporting libraries will interact with each other and permit the creation of reconfigurable applications from a fast, friendly and integrated suite of software." 

"In addition to the obvious benefits this technology offers for Defense and Space-based systems, this development program clearly supports the defense industry’s initiative to use commercial off-the-shelf, or COTS, technology," said Rick Padovani, director of the Xilinx Defense and Aerospace Group. "All Xilinx FPGAs as well as the Java-based development tools are COTS products. This parallels a continuing trend to choose off-the-shelf FPGAs over custom products such as ASICs." 

COTS is a growing initiative within the federal defense procurement community to use commercially available products instead of more expensive and difficult-to-source customized products. 

The fast and flexible Xilinx JBits API enables applications designers to specify in Java code all details about FPGA routing and logic resources. The primary goal of the Xilinx R&D effort will be to raise the level abstraction so that reconfigurable FPGA designs can be completed by a wider range of developers, including software programmers. Some initial components of the tool suite will include: 

• The JBits API
• Xilinx Hardware Interface (XHWIF), a board interface API that eases porting to new systems and provides transparent networked access for tools and applications.
• Xilinx Virtexä Portable Interface (XVPI), a hardware guideline and software for building Virtex hardware using the fast SelectMap interface for full or partial configuration, reconfiguration, as well as readback.
• A library of macrocells, or cores, written in Java, whose parameters can be set at runtime within the application. These runtime parameter-driven cores will raise the level of abstraction for designers, relieving them of the need to have exacting knowledge of FPGA resources. The cores also will supply the circuit logic to connect cores with specific functions such as memory interfaces. 
• An interactive debug tool that permits detailed probing of FPGA hardware. In addition to having circuit-editing capabilities, the debug tool will provide a high level of interaction between the hardware and software portion of the design. 
• An FPGA device simulator that allows complete runtime reconfigurable designs to be verified to meet speed and functionality requirements. 
• APIs that support fast and flexible automatic placement and routing of parameter-driven cores.