FOR IMMEDIATE RELEASE
XILINX RELEASES NEW IP CORES FOR TEN MILLION GATE FPGAS
SAN JOSE, Calif., July 17, 2000—Xilinx, Inc., (NASDAQ: XLNX) announced today the immediate availability of 29 new IP cores for use with Xilinx® Foundation™ and Alliance™ 3.1i software development tools. The cores support Virtex™-II, the next generation Virtex architecture, providing designers with a proven solution to accelerate the design of ten million system-gate FPGAs. Xilinx utilizes Smart-IP technology to deliver predictable, flexible, high performance cores that are scalable to any FPGA density without performance degradation. The release also includes general-purpose cores and DSP cores supporting Xilinx Virtex and Spartan®-II series FPGAs. "Last year Xilinx set a new industry standard by providing complete IP support at the time of silicon availability for the Virtex-E and Spartan-II families,” said Rich Sevick, senior vice president of IP, services and support at Xilinx. “Now we've raised the bar even further by making critical IP available for Virtex-II customers in advance of silicon. This will enable our customers to start their ten million gate high-speed designs today.” Core Release Content
In the storage elements and memories group, designers have access to cores such as parameterized asynchronous FIFOs and single-/dual-port on-chip memories which are key building blocks in many system-level designs. The math functions and basic elements group includes cores such as parameterized high-performance multipliers, sine/cosine lookup tables, accumulators, and adders and subtractors. A complete list of cores can be found on the Xilinx IP-Center. License price and availability
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