FOR IMMEDIATE RELEASE
VIRTEX FPGAS PROVIDE TIME-TO-MARKET ADVANTAGE
Xilinx devices play key role in development of superfast network system SAN JOSE, Calif., May 9, 2000 — Xilinx, Inc. (NASDAQ:XLNX) today announced the use of its multi-million gate Virtex™ device to build IP router line cards for the Hyperchip Matrix™. To accelerate time-to-market of its leading-edge architecture, network startup Hyperchip, Inc. chose Xilinx® Virtex FPGAs. The FPGA-based matrix system is featured this week at the N+1 show (Hyperchip booth #7837) in LasVegas, Nevada. “Xilinx FPGAs have been essential to delivering the Hyperchip Matrix,” said Richard Norman, Hyperchip President and CTO. “Running a million-packet-per-port test on our fastest ASIC-based workstation takes 28 days, while our Xilinx FPGA-based Matrix can handle it in half a second.” Hyperchip’s routing architecture allows IP (internet protocol) routing to scale from terabits to petabits (quadrillion bits) per second of aggregate port bandwidth. Hyperchip’s FPGA-based development system already achieves the density of competitors' ASIC-based systems. Hyperchip's Matrix ASIC will merge 16 large FPGA designs into a single ASIC, achieving record fabric density and greater efficiency than any existing system in the industry, according to Norman. “Virtex FPGAs allow Hyperchip to test and tune the design at zero cost with a one-day total turnaround on modifications,” said Norman. “Time-to-market is everything in this business. Xilinx FPGAs have been critical to our success. Verifying a chip of this scale without Xilinx would be impossible.” “Hyperchip's development strategy underscores the important role of high-performance FPGAs in the creation of the next generation of equipment for the network infrastructure,” said Bruce Weyer, senior director of marketing for the advanced product group at Xilinx. “Our Virtex solution is the ideal platform for the type of design Hyperchip has undertaken.” Xilinx Virtex Series consists of Virtex, Virtex-E, and Virtex-E Extended Memory FPGA families. All devices are equipped with distributed RAM and blockRAM, and between four and eight delay locked loops (DLLs) for efficient clock management. The Virtex-E family offers the highest logic gate count available for any FPGA, ranging from 50,000 to 3.2 million system gates. Virtex-E FPGAs are the first programmable logic devices delivered on 0.18 micron process technology. About Hyperchip
About Xilinx
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