| FOR IMMEDIATE RELEASE
XILINX DEPLOYS COPPER ON NETWORK SWITCH FPGA FAMILY New VirtexTM-E Extended Memory family supports 160 Gbps buffered cross-bar switches Also available are
“Xilinx developed the Virtex-EM family to address application requirements identified primarily by our large networking customers,” said Dennis Segers, senior vice president and general manager of the Xilinx High-End FPGA division. “The unique combination of block RAM and logic, along with copper interconnect, offer networking companies an architecture platform for their 160 Gbps switch fabrics. The high memory-to-logic-ratio content is also ideal for other data intensive applications such as high definition video imaging.” The Virtex-EM family significantly increases block RAM content and leverages the success of the Virtex-E family. Like its predecessor, the Virtex-EM architecture includes eight Delay Locked Loops (DLLs), distributed RAM, and a seamless interface to 20 voltage and signal standards, including LVDS, Bus LVDS, and LVPECL differential signaling. "When we architect our products, we specifically look for places we can leverage the time to market and flexibility advantages of Xilinx FPGAs," said Satish Soman, vice president of Chip Development, Core Routing Division, Lucent Technologies. "For our next generation products, the Virtex-E Extended memory devices have great potential in addressing unique needs of our resource management system." Perfect for network switching applications… Industry-leading Virtex-E devices are used in communications, networking, and video and image processing applications, where the inherent flexibility of the architecture allows powerful data path and digital signal processing (DSP) operations to be efficiently implemented. Within these market segments, many applications can benefit from additional block memory used for FIFOs and buffers, which greatly enhance overall system bandwidth. For example, network systems using 160 Gbps buffered crossbar switches can use the large on-chip memory of the Virtex-EM devices to combine all the individual FIFO memories as well as the interconnect logic on a single FPGA. This allows increased data bandwidth and greater integration. "The Virtex-EM family represents another example of innovation we have come to expect from Xilinx," said Marion Rusu, manager of the hardware engineering group of the ATM division at Cisco Systems, Inc. "With the memory bandwidth possible, I definitely see a great future for these devices at Cisco." …and high-end video processing applications Another example is high-end video processing, which use DSP engines to improve image quality and implement video compression and decompression algorithms. Traditionally, the video processing engine is implemented in either an FPGA or an ASIC with an external line buffer memory to store eight pixel lines. By using the large block RAM capacity of the Virtex-EM device, both the line buffer memory and either a video processing engine or a DSP function can be accommodated on the same device, which greatly enhances the overall system bandwidth. First with copper process technology Over the past two years, Xilinx engineers have worked in close collaboration with United Microelectronics Corporation (UMC) toward the developed of the advanced copper process technology used to build the Virtex-EM family. The delivery of these devices marks the first availability of copper-based FPGAs. The devices are produced on a 0.18-micron, six-layer process using a combination of aluminum and copper interconnect technology. The family uses copper in the top two layers of metal to reduce internal power supply voltage drop and minimize clock skew. Virtex-E Extended Memory Family Samples of the XCV812ETM are available
now, and the XCV405ETM will be sampled
in June. Both devices are expected to be in full production in third quarter
this year. The XCV812E and the XCV405E devices are priced at $235 and $101,
respectively for 50,000 units in Q4 2001.
Fully supported product offering In the Xilinx tradition of having cores available at the time of silicon availability, the Virtex-EM family is supported with the latest release of cores currently available and downloadable from the IP center. All the cores can be installed for use via the Xilinx COREGeneratorTM System. This cores release includes many Smart IPTM cores that are parameterizable, optimized, and predictable. For example, the release includes parameterizable generators for asynchronous FIFOs, block memory modules, distributed memory, parallel multipliers, FIR filters, FFTs, NCOs, Sine/Cosine LUT, and many more base level functions, as well as the configurable Reed Solomon Encoder and Decoder cores. The current Xilinx Alliance SeriesTM and Foundation SeriesTM software version 2.1i fully support the XCV812E device. Software support for the XCV405E device will be available in the second quarter. For customers with a chosen EDA design flow, the Xilinx AllianceEDA program insures that industry-leading EDA vendors have tight integration with both the Alliance Series and Foundation Series software. As a result, the customer has a wide selection of EDA tools from which to choose, from design entry through simulation to board level verification. Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, California, Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com. —30— #0020
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