What's New
Success Stories
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The CoolRunner XPLA3 eXtended Programmable Logic Array family of CPLDs is targeted for low power applications that include portable, handheld, and power sensitive applications. Each member of the XPLA3 family includes Fast Zero Power (FZP) design technology that combines low power AND high speed. With this design technique, the XPLA3 family offers true pin-to-pin speeds of 5.0 ns, while simultaneously delivering power that is <100ľA (standby) without the need for special "power down bits" that negatively affect device performance.
XPLA3 Architecture
The XPLA3 architecture features a direct input register path, multiple clocks, JTAG programming, 5 volt tolerant I/Os and a full PLA structure. These enhancements deliver high speed coupled with the best flexible logic allocation which results in the ability to make design changes without changing pin-outs. The XPLA3 architecture includes a pool of 48 product terms that can be allocated to any macrocell in the logic block. This combination allows logic to be allocated efficiently throughout the logic block and support as many product terms as needed per macrocell. In addition, there is no speed penalty for using a variable number of product terms per macrocell.
XPLA3 Features and Benefits
Features
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Benefits
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- Total CMOS architecture with FZP design technology
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- Lowest stand-by and total current consumption of any CPLD
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- 32 to 384 macrocell device selections
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- Fast pin to pin timing 32 M/C - 5 ns
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- Perfect fit for high speed systems
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- 3.3 Volt operation with 5 Volt tolerant I/Os
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- Simplifies multivoltage system design
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- Full 36 by 48 PLA - Full Programmable AND / Programmable OR structure
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- Optimizes sharing and resource utilization (all product terms available)
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- Pull-up resistor for I/O termination
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- Multiple clocking options
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- Maximum clocking resources for design flexibility
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- Supports direct high speed interface
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- VFM (Variable Function Mux) and Fold-back NANDs
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- Superior logic optimization and device fitting
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- Small, surface mount packages - .8mm and .5mm ball pitch Chip Scale BGAs
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- Smallest footprint and board space savings
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- Advanced 5 metal layer process technology
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- Industrial and Commercial temperature ranges
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- Full Industrial temperature and operating range (2.7 to 3.6 Volt)
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XPLA3 Software Tools
Software support for XPLA3 devices is provided by Xilinx WebPOWERED software products which include WebFITTER and WebPACK. Both tools are free. In addition, EDIF input for all major 3rd party software flows such as Cadence, Mentor, Viewlogic, Exemplar and Synopsys are supported. |
CoolRunner XPLA3 Family
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XCR
3032XL
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XCR
3064XL
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XCR
3128XL
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XCR
3256XL
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XCR
3384XL
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Macrocells |
32
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64
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128
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256
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384
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Usable Gates |
800
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1,600
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3,200
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6,400
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9,600
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tPD(ns) |
5
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6
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6
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7.5
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7.5
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f SYS (MHz) |
175
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145
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145
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140
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127
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Packages
(Max User I/O) |
VQ44
(36)
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VQ44
(36)
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PC44
(36)
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PC44
(36)
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CS48
(36)
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CS48
(40)
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CP56
(48)
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VQ100
(68)
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VQ100
(84)
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CS144
(108)
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TQ144
(108)
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TQ144
(120)
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PQ208
(164)
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PQ208
(172)
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FT256
(164)
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FT256
(212)
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CS280
(164)
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