Mentor Graphics Interface: Getting Started

XACT 5.x Setup

M1.x Setup

Schematic Design
Verilog/VHDL Design

XACT 5.x Setup

In this example, the XACT 5.x Core Tools (DS502) have been installed for SunOS 4.1.x in /tools/xact_521/ds502. The Mentor Graphics Interface (DS344) has been installed in /tools/xact_521/ds344. The Mentor Graphics vendor software (where Design Manager and Design Architect are located) has been installed in /tools/mentor_A4. Please substitute the appropriate directory paths that apply to your own system. Also, if you are running the tools on HP-UX 9.x or 10.x, please substitute hppa for sparc where appropriate.

To run XACT 5.x software with the Mentor Graphics Interface, the following environment variables must be set:

setenv LCA /tools/xact_521/ds344
setenv XACT ${LCA}:/tools/xact_521/ds502
set path = ( $path \
   $LCA/com/sparc $LCA/bin/sparc \
   /tools/xact_521/ds502/com/sparc )

In addition, the following variables must be set for the Mentor Graphics third-party software. Consult the appropriate Mentor Graphics documentation for more information.

setenv MGC_HOME /tools/mentor_A4
setenv MGC_GENLIB $MGC_HOME/gen_lib
setenv MGC_LOCATION_MAP /usr/local/data/mentor/mgc_location_map
setenv MGLS_LICENSE_FILE /usr/local/data/license/mentor_license.dat
setenv LD_LIBRARY_PATH $MGC_HOME/shared/lib:$MGC_HOME/lib:/usr/openwin/lib
set path = ( $path $MGC_HOME/bin )

# MGC_LOCATION_MAP: Substitute path to MGC location map.
# MGLS_LICENSE_FILE: Substitute path to FlexLM-format license file.
# LD_LIBRARY_PATH: Remove /usr/openwin/lib for HP-UX.
#    For HP-UX 10.x, use SHLIB_PATH variable instead.

In addition, the LCA and MGC_GENLIB environment variables must be added to the file referenced by $MGC_LOCATION_MAP so that the Mentor Graphics Software can recognize them. A location-map file may look like:

MGC_LOCATION_MAP_1

$LCA

$MGC_GENLIB

Consult the Mentor Graphics documentation for more information on location maps.

M1.x Setup

Schematic Design

In this example, The Xilinx M1 Core Tools have been installed for Solaris 2.5 in /tools/xilinx_M1. The Mentor Graphics Interface is part of the Xilinx M1 tree under $XILINX/mentor. The Mentor Graphics vendor software (where Design Manager and Design Architect are located) has been installed in /tools/mentor_B1. Please substitute the appropriate directory paths that apply to your own system. Also, if you are running the tools under HP-UX or SunOS 4.1.x, please substitute hp or sun for sol where appropriate.

To run Xilinx M1 software with the Mentor Graphics Interface, the following environment variables must be set:

setenv XILINX /tools/xilinx_M1
setenv LCA $XILINX/mentor/data
setenv SIMPRIMS $LCA/simprims
set path = ( $path $XILINX/mentor/bin/sol $XILINX/bin/sol )

In addition, the following variables must be set for the Mentor Graphics third-party software. Consult the appropriate Mentor Graphics documentation for more information.

setenv MGC_HOME /tools/mentor_B1
setenv MGC_GENLIB $MGC_HOME/gen_lib
setenv MGC_LOCATION_MAP /usr/local/data/mentor/mgc_location_map
setenv MGLS_LICENSE_FILE /usr/local/data/license/mentor_license.dat
setenv LD_LIBRARY_PATH $MGC_HOME/shared/lib:$MGC_HOME/lib:/usr/openwin/lib
set path = ( $path $MGC_HOME/bin )

# MGC_LOCATION_MAP: Substitute path to MGC location map.
# MGLS_LICENSE_FILE: Substitute path to FlexLM-format license file.
# LD_LIBRARY_PATH: Remove /usr/openwin/lib for HP-UX.
#    For HP-UX 10.x, use SHLIB_PATH variable instead.

The LCA, SIMPRIMS, and MGC_GENLIB environment variables must also be added to the file referenced by $MGC_LOCATION_MAP so that the Mentor Graphics Software can recognize them. A location-map file may look like:

MGC_LOCATION_MAP_1

$LCA

$SIMPRIMS

$MGC_GENLIB

Consult the Mentor Graphics documentation for more information on location maps.

Verilog and VHDL Design

To perform timing or post-synthesis functional HDL simulation in M1, the Verilog and/or VHDL (VITAL) simprim models must be compiled for use in QuickHDL. If instantiated LogiBLOX and/or Unified library components are to be behaviorally simulated, the LogiBLOX and/or Unisim libraries must be compiled, as well.

Using the automatic compile scripts

M1 includes the following scripts that automatically compile the Verilog and VHDL simulation models for your particular version of QuickHDL:

$XILINX/mentor/data/verilog/compile_verilog_libs.sh
$XILINX/mentor/data/vhdl/compile_vhdl_libs.sh

For more information on using these scripts, see the accompanying README files. These scripts should be run by your system administrator.

Note: The Verilog compile script will only compile XC3000, XC4000X (not XC4000E), and XC5200 Unisim models (M1.4 and later only). To compile the Unisim libraries for other device families, see the next section.

Compiling the HDL libraries manually

The information below is intended mainly for reference. Since compile scripts for QuickHDL are already included with the Mentor Graphics interface, you should not need the following instructions unless you need to compile Unisim libraries for families not listed in the Verilog compile script (e.g., XC4000E or XC9500), have problems with the compile scripts or need to perform a partial library compilation.

M1 contains three types of HDL simulation libraries:

simprim: Library of generic simulation primitives
LogiBLOX: Library of LogiBLOX simulation models
Unisim: Library of Unified component simulation models (M1.4+)

The instructions that follow reference the following variables:

VERILOG_DESTN: Location for compiled Verilog libraries
Recommended setting: $XILINX/mentor/data/verilog
VHDL_DESTN: Location for compiled VHDL libraries
Recommended setting: $XILINX/mentor/data/vhdl

If you want logical library names to be available for all designs, set your QUICKHDL environment variable to the location of your master quickhdl.ini file, e.g.:

setenv QUICKHDL $MGC_HOME/lib/quickhdl.ini

If QUICKHDL is not set when qhmap is run, the logical library mapping is done locally, and therefore all qhmap commands would have to be run for each new HDL design.

For Verilog users, the compilation commands that need to be executed are:

simprim

qhlib $VERILOG_DESTN/simprim
qhmap simprim $VERILOG_DESTN/simprim
qvlcom -work simprim $XILINX/verilog/data/*.vmd

LogiBLOX
(none required)

Unisim

qhlib $VERILOG_DESTN/uni3000
qhmap uni3000 $VERILOG_DESTN/uni3000
qvlcom -work uni3000 $XILINX/verilog/src/UNI3000/*.v

qhlib $VERILOG_DESTN/uni4000e   # Not included in compile script
qhmap uni4000e $VERILOG_DESTN/uni4000e
qvlcom -work uni4000e $XILINX/verilog/src/UNI4000E/*.v

qhlib $VERILOG_DESTN/uni4000x
qhmap uni4000x $VERILOG_DESTN/uni4000x
qvlcom -work uni4000x $XILINX/verilog/src/UNI4000X/*.v

qhlib $VERILOG_DESTN/uni5200
qhmap uni5200 $VERILOG_DESTN/uni5200
qvlcom -work uni5200 $XILINX/verilog/src/UNI5200/*.v

qhlib $VERILOG_DESTN/uni9000    # Not included in compile script
qhmap uni9000 $VERILOG_DESTN/uni9000
qvlcom -work uni9000 $XILINX/verilog/src/UNI9000/*.v

For VHDL users, the commands are:

simprim

qhlib $VHDL_DESTN/simprim
qhmap simprim $VHDL_DESTN/simprim
qvhcom -work simprim $XILINX/vhdl/src/simprims/simprim_Vpackage.vhd
qvhcom -work simprim $XILINX/vhdl/src/simprims/simprim_Vcompoents.vhd
qvhcom -work simprim $XILINX/vhdl/src/simprims/simprim_VITAL.vhd

LogiBLOX

qhlib $VHDL_DESTN/logiblox
qhmap logiblox $VHDL_DESTN/logiblox
qvhcom -work logiblox $XILINX/vhdl/src/logiblox/mvlutil.vhd
qvhcom -work logiblox $XILINX/vhdl/src/logiblox/mvlarith.vhd
qvhcom -work logiblox $XILINX/vhdl/src/logiblox/logiblox.vhd

Unisim

qhlib $VHDL_DESTN/unisim
qhmap unisim $VHDL_DESTN/unisim
qvhcom -work unisim $XILINX/vhdl/src/unisims/unisim_VPKG.vhd
qvhcom -work unisim $XILINX/vhdl/src/unisims/unisim_VCOMP.vhd
qvhcom -work unisim $XILINX/vhdl/src/unisims/unisim_VITAL.vhd
qvhcom -work unisim $XILINX/vhdl/src/unisims/unisim_VCFG4K.vhd

qhlib $VHDL_DESTN/unisim_5k
qhmap unisim_5k $VHDL_DESTN/unisim_5k
qvhcom -work unisim_5k $XILINX/vhdl/src/unisims/unisim_VPKG.vhd
qvhcom -work unisim_5k $XILINX/vhdl/src/unisims/unisim_VCOMP52K.vhd
qvhcom -work unisim_5k $XILINX/vhdl/src/unisims/unisim_VITAL.vhd
qvhcom -work unisim_5k $XILINX/vhdl/src/unisims/unisim_VITAL52K.vhd
qvhcom -work unisim_5k $XILINX/vhdl/src/unisims/unisim_VCFG52K.vhd